提交 50243efd 编写于 作者: W Will Deacon

ARM: perf: add devicetree bindings for 11MPcore, A5, A7 and A15 PMUs

This patch adds separate devicetree bindings for 11MPcore and
Cortex-{A5,A7,A15} PMUs in preparation for improved devicetree parsing
in the ARM perf-event CPU PMU driver.

Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
上级 7be2958e
......@@ -7,8 +7,12 @@ representation in the device tree should be done as under:-
Required properties:
- compatible : should be one of
"arm,cortex-a15-pmu"
"arm,cortex-a9-pmu"
"arm,cortex-a8-pmu"
"arm,cortex-a7-pmu"
"arm,cortex-a5-pmu"
"arm,arm11mpcore-pmu"
"arm,arm1176-pmu"
"arm,arm1136-pmu"
- interrupts : 1 combined interrupt or 1 per core.
......
......@@ -646,10 +646,14 @@ arch_initcall(cpu_pmu_reset);
* PMU platform driver and devicetree bindings.
*/
static struct of_device_id armpmu_of_device_ids[] = {
{.compatible = "arm,cortex-a15-pmu"},
{.compatible = "arm,cortex-a9-pmu"},
{.compatible = "arm,cortex-a8-pmu"},
{.compatible = "arm,arm1136-pmu"},
{.compatible = "arm,cortex-a7-pmu"},
{.compatible = "arm,cortex-a5-pmu"},
{.compatible = "arm,arm11mpcore-pmu"},
{.compatible = "arm,arm1176-pmu"},
{.compatible = "arm,arm1136-pmu"},
{},
};
......
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