MIPS: features: Add initial support for Segmentation Control registers
MIPS32R3 introduced a new set of Segmentation Control registers which increase the flexibility of the segmented-based memory scheme. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6131/
Showing
想要评论请 注册 或 登录