ARM: dts: meson8b: add support for booting the secondary CPU cores
Booting the secondary CPU cores involves the following nodes/devices: - SCU (Snoop-Control-Unit, for which we already have a DT node) - a reset line for each CPU core, provided by the reset-controller which is built into the clock-controller - the PMU (power management unit) which controls the power of the CPU cores - a range in the SRAM specifically reserved for booting secondary CPU cores - the "enable-method" which activates booting the secondary CPU cores This adds all required nodes and properties to boot the secondary CPU cores. Signed-off-by: NCarlo Caione <carlo@caione.org> Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: NLinus Lüssing <linus.luessing@c0d3.blue> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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