提交 42e0a9aa 编写于 作者: T Thomas Gleixner 提交者: Ingo Molnar

x86: use u32 for some lapic functions

Use u32 so 32 and 64bit have the same interface.

Andrew Morton: xen, lguest build fixes
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NIngo Molnar <mingo@elte.hu>
上级 3c6bb07a
......@@ -135,9 +135,9 @@ void apic_wait_icr_idle(void)
cpu_relax();
}
unsigned long safe_apic_wait_icr_idle(void)
u32 safe_apic_wait_icr_idle(void)
{
unsigned long send_status;
u32 send_status;
int timeout;
timeout = 0;
......
......@@ -788,11 +788,11 @@ static void lguest_wbinvd(void)
* code qualifies for Advanced. It will also never interrupt anything. It
* does, however, allow us to get through the Linux boot code. */
#ifdef CONFIG_X86_LOCAL_APIC
static void lguest_apic_write(unsigned long reg, unsigned long v)
static void lguest_apic_write(unsigned long reg, u32 v)
{
}
static unsigned long lguest_apic_read(unsigned long reg)
static u32 lguest_apic_read(unsigned long reg)
{
return 0;
}
......
......@@ -521,12 +521,12 @@ static void xen_io_delay(void)
}
#ifdef CONFIG_X86_LOCAL_APIC
static unsigned long xen_apic_read(unsigned long reg)
static u32 xen_apic_read(unsigned long reg)
{
return 0;
}
static void xen_apic_write(unsigned long reg, unsigned long val)
static void xen_apic_write(unsigned long reg, u32 val)
{
/* Warn to see if there's any stray references */
WARN_ON(1);
......
......@@ -51,25 +51,23 @@ extern int local_apic_timer_disabled;
#define setup_secondary_clock setup_secondary_APIC_clock
#endif
static __inline fastcall void native_apic_write(unsigned long reg,
unsigned long v)
static __inline fastcall void native_apic_write(unsigned long reg, u32 v)
{
*((volatile unsigned long *)(APIC_BASE+reg)) = v;
*((volatile u32 *)(APIC_BASE + reg)) = v;
}
static __inline fastcall void native_apic_write_atomic(unsigned long reg,
unsigned long v)
static __inline fastcall void native_apic_write_atomic(unsigned long reg, u32 v)
{
xchg((volatile unsigned long *)(APIC_BASE+reg), v);
(void) xchg((u32 *)(APIC_BASE + reg), v);
}
static __inline fastcall unsigned long native_apic_read(unsigned long reg)
static __inline fastcall u32 native_apic_read(unsigned long reg)
{
return *((volatile unsigned long *)(APIC_BASE+reg));
return *((volatile u32 *)(APIC_BASE + reg));
}
extern void apic_wait_icr_idle(void);
extern unsigned long safe_apic_wait_icr_idle(void);
extern u32 safe_apic_wait_icr_idle(void);
extern int get_physical_broadcast(void);
#ifdef CONFIG_X86_GOOD_APIC
......
......@@ -38,14 +38,14 @@ struct pt_regs;
* Basic functions accessing APICs.
*/
static __inline void apic_write(unsigned long reg, unsigned int v)
static __inline void apic_write(unsigned long reg, u32 v)
{
*((volatile unsigned int *)(APIC_BASE+reg)) = v;
}
static __inline unsigned int apic_read(unsigned long reg)
static __inline u32 apic_read(unsigned long reg)
{
return *((volatile unsigned int *)(APIC_BASE+reg));
return *((volatile u32 *)(APIC_BASE+reg));
}
extern void apic_wait_icr_idle(void);
......
......@@ -150,9 +150,9 @@ struct pv_apic_ops {
* Direct APIC operations, principally for VMI. Ideally
* these shouldn't be in this interface.
*/
void (*apic_write)(unsigned long reg, unsigned long v);
void (*apic_write_atomic)(unsigned long reg, unsigned long v);
unsigned long (*apic_read)(unsigned long reg);
void (*apic_write)(unsigned long reg, u32 v);
void (*apic_write_atomic)(unsigned long reg, u32 v);
u32 (*apic_read)(unsigned long reg);
void (*setup_boot_clock)(void);
void (*setup_secondary_clock)(void);
......@@ -690,17 +690,17 @@ static inline void slow_down_io(void) {
/*
* Basic functions accessing APICs.
*/
static inline void apic_write(unsigned long reg, unsigned long v)
static inline void apic_write(unsigned long reg, u32 v)
{
PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
}
static inline void apic_write_atomic(unsigned long reg, unsigned long v)
static inline void apic_write_atomic(unsigned long reg, u32 v)
{
PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
}
static inline unsigned long apic_read(unsigned long reg)
static inline u32 apic_read(unsigned long reg)
{
return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
}
......
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