fpga zynq: Use the scatterlist interface
This allows the driver to avoid a high order coherent DMA allocation and memory copy. With this patch it can DMA directly from the kernel pages that the bitfile is stored in. Since this is now a gather DMA operation the driver uses the ISR to feed the chips DMA queue with each entry from the SGL. Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com> Acked-by: NMoritz Fischer <moritz.fischer@ettus.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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