提交 41f2a93c 编写于 作者: L Linus Torvalds

Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:
 "A set of ARM fixes:

   - fix an off-by-one error in the iommu DMA ops, which caused errors
     with a 4GiB size.

   - remove comments mentioning the non-existent CONFIG_CPU_ARM1020_CPU_IDLE
     macro.

   - remove useless CONFIG_CPU_ICACHE_STREAMING_DISABLE blocks, where
     this symbol never appeared in any Kconfig.

   - fix Feroceon code to cope with a previous change correctly (it
     incorrectly left an additional word in an assembly structure
     definition)

   - avoid a misleading IRQ affinity warning in the ARM PMU code for
     IRQs which are already affine to their CPUs.

   - fix the node name printed in the IRQ affinity warning"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8352/1: perf: Fix the pmu node name in warning message
  ARM: 8351/1: perf: don't warn about missing interrupt-affinity property for PPIs
  ARM: 8350/1: proc-feroceon: Fix feroceon_proc_info macro
  ARM: 8349/1: arch/arm/mm/proc-arm925.S: remove dead #ifdef block
  ARM: 8348/1: remove comments on CPU_ARM1020_CPU_IDLE
  ARM: 8347/1: dma-mapping: fix off-by-one check in arm_setup_iommu_dma_ops
...@@ -25,7 +25,7 @@ struct dma_iommu_mapping { ...@@ -25,7 +25,7 @@ struct dma_iommu_mapping {
}; };
struct dma_iommu_mapping * struct dma_iommu_mapping *
arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size); arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size);
void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping); void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping);
......
...@@ -303,12 +303,17 @@ static int probe_current_pmu(struct arm_pmu *pmu) ...@@ -303,12 +303,17 @@ static int probe_current_pmu(struct arm_pmu *pmu)
static int of_pmu_irq_cfg(struct platform_device *pdev) static int of_pmu_irq_cfg(struct platform_device *pdev)
{ {
int i; int i, irq;
int *irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL); int *irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
if (!irqs) if (!irqs)
return -ENOMEM; return -ENOMEM;
/* Don't bother with PPIs; they're already affine */
irq = platform_get_irq(pdev, 0);
if (irq >= 0 && irq_is_percpu(irq))
return 0;
for (i = 0; i < pdev->num_resources; ++i) { for (i = 0; i < pdev->num_resources; ++i) {
struct device_node *dn; struct device_node *dn;
int cpu; int cpu;
...@@ -317,7 +322,7 @@ static int of_pmu_irq_cfg(struct platform_device *pdev) ...@@ -317,7 +322,7 @@ static int of_pmu_irq_cfg(struct platform_device *pdev)
i); i);
if (!dn) { if (!dn) {
pr_warn("Failed to parse %s/interrupt-affinity[%d]\n", pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",
of_node_full_name(dn), i); of_node_full_name(pdev->dev.of_node), i);
break; break;
} }
......
...@@ -1878,7 +1878,7 @@ struct dma_map_ops iommu_coherent_ops = { ...@@ -1878,7 +1878,7 @@ struct dma_map_ops iommu_coherent_ops = {
* arm_iommu_attach_device function. * arm_iommu_attach_device function.
*/ */
struct dma_iommu_mapping * struct dma_iommu_mapping *
arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size) arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
{ {
unsigned int bits = size >> PAGE_SHIFT; unsigned int bits = size >> PAGE_SHIFT;
unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long); unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
...@@ -1886,6 +1886,10 @@ arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size) ...@@ -1886,6 +1886,10 @@ arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size)
int extensions = 1; int extensions = 1;
int err = -ENOMEM; int err = -ENOMEM;
/* currently only 32-bit DMA address space is supported */
if (size > DMA_BIT_MASK(32) + 1)
return ERR_PTR(-ERANGE);
if (!bitmap_size) if (!bitmap_size)
return ERR_PTR(-EINVAL); return ERR_PTR(-EINVAL);
...@@ -2057,13 +2061,6 @@ static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size, ...@@ -2057,13 +2061,6 @@ static bool arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
if (!iommu) if (!iommu)
return false; return false;
/*
* currently arm_iommu_create_mapping() takes a max of size_t
* for size param. So check this limit for now.
*/
if (size > SIZE_MAX)
return false;
mapping = arm_iommu_create_mapping(dev->bus, dma_base, size); mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
if (IS_ERR(mapping)) { if (IS_ERR(mapping)) {
pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n", pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
......
...@@ -22,8 +22,6 @@ ...@@ -22,8 +22,6 @@
* *
* These are the low level assembler for performing cache and TLB * These are the low level assembler for performing cache and TLB
* functions on the arm1020. * functions on the arm1020.
*
* CONFIG_CPU_ARM1020_CPU_IDLE -> nohlt
*/ */
#include <linux/linkage.h> #include <linux/linkage.h>
#include <linux/init.h> #include <linux/init.h>
......
...@@ -22,8 +22,6 @@ ...@@ -22,8 +22,6 @@
* *
* These are the low level assembler for performing cache and TLB * These are the low level assembler for performing cache and TLB
* functions on the arm1020e. * functions on the arm1020e.
*
* CONFIG_CPU_ARM1020_CPU_IDLE -> nohlt
*/ */
#include <linux/linkage.h> #include <linux/linkage.h>
#include <linux/init.h> #include <linux/init.h>
......
...@@ -441,9 +441,6 @@ ENTRY(cpu_arm925_set_pte_ext) ...@@ -441,9 +441,6 @@ ENTRY(cpu_arm925_set_pte_ext)
.type __arm925_setup, #function .type __arm925_setup, #function
__arm925_setup: __arm925_setup:
mov r0, #0 mov r0, #0
#if defined(CONFIG_CPU_ICACHE_STREAMING_DISABLE)
orr r0,r0,#1 << 7
#endif
/* Transparent on, D-cache clean & flush mode. See NOTE2 above */ /* Transparent on, D-cache clean & flush mode. See NOTE2 above */
orr r0,r0,#1 << 1 @ transparent mode on orr r0,r0,#1 << 1 @ transparent mode on
......
...@@ -602,7 +602,6 @@ __\name\()_proc_info: ...@@ -602,7 +602,6 @@ __\name\()_proc_info:
PMD_SECT_AP_WRITE | \ PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ PMD_SECT_AP_READ
initfn __feroceon_setup, __\name\()_proc_info initfn __feroceon_setup, __\name\()_proc_info
.long __feroceon_setup
.long cpu_arch_name .long cpu_arch_name
.long cpu_elf_name .long cpu_elf_name
.long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
......
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