提交 40eb0de5 编写于 作者: J Jongpill Lee 提交者: Greg Kroah-Hartman

tty: s5pv210: Add delay loop on fifo reset function for UART

This patch addes delay loop on fifo reset function for UART.
On high speed freq, it needs delay function when fifo reset.
If not, system will hang by this uart reset problem when resuming
from suspend mode.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
上级 5568181f
无相关合并请求
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/serial_core.h> #include <linux/serial_core.h>
#include <linux/serial.h> #include <linux/serial.h>
#include <linux/delay.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <mach/hardware.h> #include <mach/hardware.h>
...@@ -83,6 +84,9 @@ static int s5pv210_serial_resetport(struct uart_port *port, ...@@ -83,6 +84,9 @@ static int s5pv210_serial_resetport(struct uart_port *port,
wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
wr_regl(port, S3C2410_UFCON, cfg->ufcon); wr_regl(port, S3C2410_UFCON, cfg->ufcon);
/* It is need to delay When reset FIFO register */
udelay(1);
return 0; return 0;
} }
......
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