提交 3a97fc34 编写于 作者: H Hidetoshi Seto 提交者: Borislav Petkov

x86, mce: Check the result of ancient_init()

Because "ancient CPUs" like p5 and winchip don't have X86_FEATURE_MCA
(I suppose so), mcheck_cpu_init() on such CPUs will return at check of
mce_available() after __mcheck_cpu_ancient_init().

It is hard to know this implicit behavior without knowing the CPUs
well. So make it clear that we leave mcheck_cpu_init() when the CPU is
initialized in __mcheck_cpu_ancient_init().
Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Acked-by: NTony Luck <tony.luck@intel.com>
Link: http://lkml.kernel.org/r/4DEED74B.20502@jp.fujitsu.comSigned-off-by: NBorislav Petkov <borislav.petkov@amd.com>
上级 b8325c5b
...@@ -1332,18 +1332,23 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c) ...@@ -1332,18 +1332,23 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
return 0; return 0;
} }
static void __cpuinit __mcheck_cpu_ancient_init(struct cpuinfo_x86 *c) static int __cpuinit __mcheck_cpu_ancient_init(struct cpuinfo_x86 *c)
{ {
if (c->x86 != 5) if (c->x86 != 5)
return; return 0;
switch (c->x86_vendor) { switch (c->x86_vendor) {
case X86_VENDOR_INTEL: case X86_VENDOR_INTEL:
intel_p5_mcheck_init(c); intel_p5_mcheck_init(c);
return 1;
break; break;
case X86_VENDOR_CENTAUR: case X86_VENDOR_CENTAUR:
winchip_mcheck_init(c); winchip_mcheck_init(c);
return 1;
break; break;
} }
return 0;
} }
static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c) static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
...@@ -1397,7 +1402,8 @@ void __cpuinit mcheck_cpu_init(struct cpuinfo_x86 *c) ...@@ -1397,7 +1402,8 @@ void __cpuinit mcheck_cpu_init(struct cpuinfo_x86 *c)
if (mce_disabled) if (mce_disabled)
return; return;
__mcheck_cpu_ancient_init(c); if (__mcheck_cpu_ancient_init(c))
return;
if (!mce_available(c)) if (!mce_available(c))
return; return;
......
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