提交 3965b4f0 编写于 作者: R Roman Li 提交者: Greg Kroah-Hartman

drm/amd/display: Fix 6x4K displays light-up on Vega20 (v2)

[ Upstream commit c6888879fd55b1ba903c2a770127edbf6aef6f27 ]

[Why]
More than 4x4K didn't lightup on Vega20 due to low dcfclk value.
Powerplay expects valid min requirement for dcfclk from DC.

[How]
Update min_dcfclock_khz based on min_engine_clock value.

v2: backport to 4.20 (Alex)
Reviewed-by: NHersen Wu <hersenxs.wu@amd.com>
Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: NEvan Quan <evan.quan@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NRoman Li <Roman.Li@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NSasha Levin <sashal@kernel.org>
上级 bdf7c4c8
...@@ -2530,6 +2530,8 @@ static void pplib_apply_display_requirements( ...@@ -2530,6 +2530,8 @@ static void pplib_apply_display_requirements(
dc, dc,
context->bw.dce.sclk_khz); context->bw.dce.sclk_khz);
pp_display_cfg->min_dcfclock_khz = pp_display_cfg->min_engine_clock_khz;
pp_display_cfg->min_engine_clock_deep_sleep_khz pp_display_cfg->min_engine_clock_deep_sleep_khz
= context->bw.dce.sclk_deep_sleep_khz; = context->bw.dce.sclk_deep_sleep_khz;
......
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