提交 2ef28cfb 编写于 作者: M Mitch Williams 提交者: Jeff Kirsher

i40e: use functions to enable and disable icr 0

Introduce i40e_irq_dynamic_disable_icr0 and use it and its previously-
extant counterpart when appropriate.

Change-Id: Ieb4037874fba2e96fc2354b34a97a3cb8f6490f3
Signed-off-by: NMitch Williams <mitch.a.williams@intel.com>
Signed-off-by: NJesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: NKavindya Deegala <kavindya.s.deegala@intel.com>
Tested-by: NSibai Li <sibai.li@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
上级 36fac581
......@@ -565,6 +565,7 @@ static inline void i40e_dbg_init(void) {}
static inline void i40e_dbg_exit(void) {}
#endif /* CONFIG_DEBUG_FS*/
void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
......
......@@ -2542,6 +2542,19 @@ static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
i40e_flush(hw);
}
/**
* i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
* @pf: board private structure
**/
void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
{
struct i40e_hw *hw = &pf->hw;
wr32(hw, I40E_PFINT_DYN_CTL0,
I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
i40e_flush(hw);
}
/**
* i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
* @pf: board private structure
......
......@@ -719,15 +719,14 @@ static bool i40e_vfs_are_assigned(struct i40e_pf *pf)
**/
void i40e_free_vfs(struct i40e_pf *pf)
{
struct i40e_hw *hw = &pf->hw;
int i, tmp;
if (!pf->vf)
return;
/* Disable interrupt 0 so we don't try to handle the VFLR. */
wr32(hw, I40E_PFINT_DYN_CTL0, 0);
i40e_flush(hw);
i40e_irq_dynamic_disable_icr0(pf);
mdelay(10); /* let any messages in transit get finished up */
/* free up vf resources */
tmp = pf->num_alloc_vfs;
......@@ -749,11 +748,7 @@ void i40e_free_vfs(struct i40e_pf *pf)
"unable to disable SR-IOV because VFs are assigned.\n");
/* Re-enable interrupt 0. */
wr32(hw, I40E_PFINT_DYN_CTL0,
I40E_PFINT_DYN_CTL0_INTENA_MASK |
I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
(I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT));
i40e_flush(hw);
i40e_irq_dynamic_enable_icr0(pf);
}
#ifdef CONFIG_PCI_IOV
......@@ -766,13 +761,12 @@ void i40e_free_vfs(struct i40e_pf *pf)
**/
static int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
{
struct i40e_hw *hw = &pf->hw;
struct i40e_vf *vfs;
int i, ret = 0;
/* Disable interrupt 0 so we don't try to handle the VFLR. */
wr32(hw, I40E_PFINT_DYN_CTL0, 0);
i40e_flush(hw);
i40e_irq_dynamic_disable_icr0(pf);
ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
if (ret) {
dev_err(&pf->pdev->dev,
......@@ -810,10 +804,7 @@ static int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
i40e_free_vfs(pf);
err_iov:
/* Re-enable interrupt 0. */
wr32(hw, I40E_PFINT_DYN_CTL0,
I40E_PFINT_DYN_CTL0_INTENA_MASK |
I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
(I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT));
i40e_irq_dynamic_enable_icr0(pf);
return ret;
}
......
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