提交 2d794510 编写于 作者: M Maxime Ripard

ARM: sunxi: Add the Allwinner A31 compatible to the machine definition

The Allwinner A31 is a quad-Cortex-A7 based SoC, which shares a lot of
IPs with the previous SoCs from Allwinner, like the PIO, I2C, UARTs,
timers, watchdog IPs, but also differs by dropping the WEMAC ethernet
controller and most notably dropping the in-house IRQ controller in
favor of a ARM GIC one.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
上级 29d3d373
...@@ -10,3 +10,5 @@ config ARCH_SUNXI ...@@ -10,3 +10,5 @@ config ARCH_SUNXI
select SPARSE_IRQ select SPARSE_IRQ
select SUN4I_TIMER select SUN4I_TIMER
select PINCTRL_SUNXI select PINCTRL_SUNXI
select ARM_GIC
select HAVE_SMP
...@@ -96,6 +96,7 @@ static const char * const sunxi_board_dt_compat[] = { ...@@ -96,6 +96,7 @@ static const char * const sunxi_board_dt_compat[] = {
"allwinner,sun4i-a10", "allwinner,sun4i-a10",
"allwinner,sun5i-a10s", "allwinner,sun5i-a10s",
"allwinner,sun5i-a13", "allwinner,sun5i-a13",
"allwinner,sun6i-a31",
NULL, NULL,
}; };
......
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