drm/i915: Use RMW to update chicken bits in gen7_enable_fbc()

gen7_enable_fbc() may write to some registers which we've already
touched, so use RMW so that we don't undo any previous updates.

Also note that we implemnt WaFbcAsynchFlipDisableFbcQueue:bdw.
Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: NDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>

drivers/gpu/drm/i915/intel_pm.c

@@ -294,10 +294,13 @@ static void gen7_enable_fbc(struct drm_crtc *crtc)
 
 	if (IS_IVYBRIDGE(dev)) {
 		/* WaFbcAsynchFlipDisableFbcQueue:ivb */
-		I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS);
+		I915_WRITE(ILK_DISPLAY_CHICKEN1,
+			   I915_READ(ILK_DISPLAY_CHICKEN1) |
+			   ILK_FBCQ_DIS);
 	} else {
-		/* WaFbcAsynchFlipDisableFbcQueue:hsw */
+		/* WaFbcAsynchFlipDisableFbcQueue:hsw,bdw */
 		I915_WRITE(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe),
+			   I915_READ(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe)) |
 			   HSW_BYPASS_FBC_QUEUE);
 	}