提交 2808801a 编写于 作者: A Anson Huang 提交者: Linus Walleij

gpio: mxc: add clock operation

Some i.MX SoCs have GPIO clock gates in CCM CCGR, such as
i.MX6SLL, need to enable clocks before accessing GPIO
registers, add optional clock operation for GPIO driver.
Signed-off-by: NAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
上级 3027743f
......@@ -20,6 +20,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/interrupt.h>
......@@ -60,6 +61,7 @@ struct mxc_gpio_hwdata {
struct mxc_gpio_port {
struct list_head node;
void __iomem *base;
struct clk *clk;
int irq;
int irq_high;
struct irq_domain *domain;
......@@ -434,6 +436,17 @@ static int mxc_gpio_probe(struct platform_device *pdev)
if (port->irq < 0)
return port->irq;
/* the controller clock is optional */
port->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(port->clk))
port->clk = NULL;
err = clk_prepare_enable(port->clk);
if (err) {
dev_err(&pdev->dev, "Unable to enable clock.\n");
return err;
}
/* disable the interrupt and clear the status */
writel(0, port->base + GPIO_IMR);
writel(~0, port->base + GPIO_ISR);
......@@ -502,6 +515,7 @@ static int mxc_gpio_probe(struct platform_device *pdev)
out_irqdomain_remove:
irq_domain_remove(port->domain);
out_bgio:
clk_disable_unprepare(port->clk);
dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err);
return err;
}
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册