提交 2353b47b 编写于 作者: B Bernd Faust 提交者: John Stultz

Round the calculated scale factor in set_cyc2ns_scale()

During some experiments with an external clock (in a FPGA), we saw that
the TSC clock drifted approx. 2.5ms per second.

This drift was caused by the current way of calculating the scale.
In our case cpu_khz had a value of 3292725. This resulted in a scale
value of 310. But when doing the calculation by hand it shows that the
actual value is 310.9886188491, so a value of 311 would be more precise.

With this change the value is rounded.
Signed-off-by: NBernd Faust <berndfaust@gmail.com>
Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
上级 023f333a
...@@ -617,7 +617,8 @@ static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu) ...@@ -617,7 +617,8 @@ static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
ns_now = __cycles_2_ns(tsc_now); ns_now = __cycles_2_ns(tsc_now);
if (cpu_khz) { if (cpu_khz) {
*scale = (NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR)/cpu_khz; *scale = ((NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR) +
cpu_khz / 2) / cpu_khz;
*offset = ns_now - mult_frac(tsc_now, *scale, *offset = ns_now - mult_frac(tsc_now, *scale,
(1UL << CYC2NS_SCALE_FACTOR)); (1UL << CYC2NS_SCALE_FACTOR));
} }
......
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