提交 2128b08c 编写于 作者: E Ezequiel Garcia 提交者: Brian Norris

mtd: nand: pxa3xx: Split FIFO size from to-be-read FIFO count

Introduce a fifo_size field to represent the size of the controller's
FIFO buffer, and use it to distinguish that size from the amount
of data bytes to be read from the FIFO.

This is important to support devices with pages larger than the
controller's internal FIFO, that need to read the pages in FIFO-sized
chunks.

In particular, the current code is at least confusing, for it mixes
all the different sizes involved: FIFO size, page size and data size.

This commit starts the cleaning by removing the info->page_size field
that is not currently used. The host->page_size field should also
be removed and use always mtd->writesize instead. Follow up commits
will clean this up.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
上级 2d79ab16
...@@ -201,8 +201,8 @@ struct pxa3xx_nand_info { ...@@ -201,8 +201,8 @@ struct pxa3xx_nand_info {
int use_spare; /* use spare ? */ int use_spare; /* use spare ? */
int is_ready; int is_ready;
unsigned int page_size; /* page size of attached chip */ unsigned int fifo_size; /* max. data size in the FIFO */
unsigned int data_size; /* data size in FIFO */ unsigned int data_size; /* data to be read from FIFO */
unsigned int oob_size; unsigned int oob_size;
int retcode; int retcode;
...@@ -303,16 +303,15 @@ static void pxa3xx_nand_set_timing(struct pxa3xx_nand_host *host, ...@@ -303,16 +303,15 @@ static void pxa3xx_nand_set_timing(struct pxa3xx_nand_host *host,
static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info) static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info)
{ {
struct pxa3xx_nand_host *host = info->host[info->cs];
int oob_enable = info->reg_ndcr & NDCR_SPARE_EN; int oob_enable = info->reg_ndcr & NDCR_SPARE_EN;
info->data_size = host->page_size; info->data_size = info->fifo_size;
if (!oob_enable) { if (!oob_enable) {
info->oob_size = 0; info->oob_size = 0;
return; return;
} }
switch (host->page_size) { switch (info->fifo_size) {
case 2048: case 2048:
info->oob_size = (info->use_ecc) ? 40 : 64; info->oob_size = (info->use_ecc) ? 40 : 64;
break; break;
...@@ -929,9 +928,12 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info) ...@@ -929,9 +928,12 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
uint32_t ndcr = nand_readl(info, NDCR); uint32_t ndcr = nand_readl(info, NDCR);
if (ndcr & NDCR_PAGE_SZ) { if (ndcr & NDCR_PAGE_SZ) {
/* Controller's FIFO size */
info->fifo_size = 2048;
host->page_size = 2048; host->page_size = 2048;
host->read_id_bytes = 4; host->read_id_bytes = 4;
} else { } else {
info->fifo_size = 512;
host->page_size = 512; host->page_size = 512;
host->read_id_bytes = 2; host->read_id_bytes = 2;
} }
......
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