提交 2090af71 编写于 作者: L Linus Torvalds

Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: (166 commits)
  [PATCH] net: au1000_eth: PHY framework conversion
  [PATCH] 3c5zz ethernet: fix section warnings
  [PATCH] smc ethernet: fix section mismatch warnings
  [PATCH] hp ethernet: fix section mismatches
  [PATCH] Section mismatch in drivers/net/ne.o during modpost
  [PATCH] e1000: prevent statistics from getting garbled during reset
  [PATCH] smc911x Kconfig fix
  [PATCH] forcedeth: new device ids
  [PATCH] forcedeth config: version
  [PATCH] forcedeth config: module parameters
  [PATCH] forcedeth config: diagnostics
  [PATCH] forcedeth config: move functions
  [PATCH] forcedeth config: statistics
  [PATCH] forcedeth config: csum
  [PATCH] forcedeth config: wol
  [PATCH] forcedeth config: phy
  [PATCH] forcedeth config: flow control
  [PATCH] forcedeth config: ring sizes
  [PATCH] forcedeth config: tso cleanup
  [DOC] Update bonding documentation with sysfs info
  ...
......@@ -14,8 +14,8 @@ Copyright (C) 2004-2006, Intel Corporation
README.ipw2200
Version: 1.0.8
Date : October 20, 2005
Version: 1.1.2
Date : March 30, 2006
Index
......@@ -103,7 +103,7 @@ file.
1.1. Overview of Features
-----------------------------------------------
The current release (1.0.8) supports the following features:
The current release (1.1.2) supports the following features:
+ BSS mode (Infrastructure, Managed)
+ IBSS mode (Ad-Hoc)
......@@ -247,8 +247,8 @@ and can set the contents via echo. For example:
% cat /sys/bus/pci/drivers/ipw2200/debug_level
Will report the current debug level of the driver's logging subsystem
(only available if CONFIG_IPW_DEBUG was configured when the driver was
built).
(only available if CONFIG_IPW2200_DEBUG was configured when the driver
was built).
You can set the debug level via:
......
......@@ -1425,6 +1425,8 @@ P: Jesse Brandeburg
M: jesse.brandeburg@intel.com
P: Jeff Kirsher
M: jeffrey.t.kirsher@intel.com
P: Auke Kok
M: auke-jan.h.kok@intel.com
W: http://sourceforge.net/projects/e1000/
S: Supported
......@@ -1437,6 +1439,8 @@ P: Jesse Brandeburg
M: jesse.brandeburg@intel.com
P: Jeff Kirsher
M: jeffrey.t.kirsher@intel.com
P: Auke Kok
M: auke-jan.h.kok@intel.com
W: http://sourceforge.net/projects/e1000/
S: Supported
......@@ -1449,6 +1453,8 @@ P: John Ronciak
M: john.ronciak@intel.com
P: Jesse Brandeburg
M: jesse.brandeburg@intel.com
P: Auke Kok
M: auke-jan.h.kok@intel.com
W: http://sourceforge.net/projects/e1000/
S: Supported
......
......@@ -909,7 +909,7 @@ MODULE_PARM_DESC(irq, "EtherLink IRQ number");
* here also causes the module to be unloaded
*/
int init_module(void)
int __init init_module(void)
{
dev_3c501 = el1_probe(-1);
if (IS_ERR(dev_3c501))
......
......@@ -688,7 +688,7 @@ MODULE_LICENSE("GPL");
/* This is set up so that only a single autoprobe takes place per call.
ISA device autoprobes on a running machine are not recommended. */
int
int __init
init_module(void)
{
struct net_device *dev;
......
......@@ -1633,7 +1633,7 @@ MODULE_PARM_DESC(io, "EtherLink Plus I/O base address(es)");
MODULE_PARM_DESC(irq, "EtherLink Plus IRQ number(s) (assigned)");
MODULE_PARM_DESC(dma, "EtherLink Plus DMA channel(s)");
int init_module(void)
int __init init_module(void)
{
int this_dev, found = 0;
......
......@@ -932,7 +932,7 @@ module_param(irq, int, 0);
MODULE_PARM_DESC(io, "EtherLink16 I/O base address");
MODULE_PARM_DESC(irq, "(ignored)");
int init_module(void)
int __init init_module(void)
{
if (io == 0)
printk("3c507: You should not use auto-probing with insmod!\n");
......
......@@ -1277,7 +1277,7 @@ MODULE_PARM_DESC(io, "EtherLink/MC I/O base address(es)");
MODULE_PARM_DESC(irq, "EtherLink/MC IRQ number(s)");
MODULE_LICENSE("GPL");
int init_module(void)
int __init init_module(void)
{
int this_dev,found = 0;
......
......@@ -1646,7 +1646,7 @@ static struct net_device *this_device;
* insmod multiple modules for now but it's a hack.
*/
int init_module(void)
int __init init_module(void)
{
this_device = mc32_probe(-1);
if (IS_ERR(this_device))
......
......@@ -19,11 +19,11 @@
See the file COPYING in this distribution for more information.
Contributors:
Wake-on-LAN support - Felipe Damasio <felipewd@terra.com.br>
PCI suspend/resume - Felipe Damasio <felipewd@terra.com.br>
LinkChg interrupt - Felipe Damasio <felipewd@terra.com.br>
TODO:
* Test Tx checksumming thoroughly
* Implement dev->tx_timeout
......@@ -461,7 +461,7 @@ static void cp_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
static inline void cp_set_rxbufsize (struct cp_private *cp)
{
unsigned int mtu = cp->dev->mtu;
if (mtu > ETH_DATA_LEN)
/* MTU + ethernet header + FCS + optional VLAN tag */
cp->rx_buf_sz = mtu + ETH_HLEN + 8;
......@@ -510,7 +510,7 @@ static void cp_rx_err_acct (struct cp_private *cp, unsigned rx_tail,
static inline unsigned int cp_rx_csum_ok (u32 status)
{
unsigned int protocol = (status >> 16) & 0x3;
if (likely((protocol == RxProtoTCP) && (!(status & TCPFail))))
return 1;
else if ((protocol == RxProtoUDP) && (!(status & UDPFail)))
......@@ -1061,7 +1061,7 @@ static void cp_init_hw (struct cp_private *cp)
cpw8(Config3, PARMEnable);
cp->wol_enabled = 0;
cpw8(Config5, cpr8(Config5) & PMEStatus);
cpw8(Config5, cpr8(Config5) & PMEStatus);
cpw32_f(HiTxRingAddr, 0);
cpw32_f(HiTxRingAddr + 4, 0);
......@@ -1351,7 +1351,7 @@ static void netdev_get_wol (struct cp_private *cp,
WAKE_MCAST | WAKE_UCAST;
/* We don't need to go on if WOL is disabled */
if (!cp->wol_enabled) return;
options = cpr8 (Config3);
if (options & LinkUp) wol->wolopts |= WAKE_PHY;
if (options & MagicPacket) wol->wolopts |= WAKE_MAGIC;
......@@ -1919,7 +1919,7 @@ static int cp_resume (struct pci_dev *pdev)
mii_check_media(&cp->mii_if, netif_msg_link(cp), FALSE);
spin_unlock_irqrestore (&cp->lock, flags);
return 0;
}
#endif /* CONFIG_PM */
......
......@@ -165,7 +165,7 @@ static int multicast_filter_limit = 32;
static int debug = -1;
/*
* Receive ring size
* Receive ring size
* Warning: 64K ring has hardware issues and may lock up.
*/
#if defined(CONFIG_SH_DREAMCAST)
......@@ -257,7 +257,7 @@ static struct pci_device_id rtl8139_pci_tbl[] = {
{0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
{0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
{0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
{0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
{0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
#ifdef CONFIG_SH_SECUREEDGE5410
/* Bogus 8139 silicon reports 8129 without external PROM :-( */
......@@ -1824,7 +1824,7 @@ static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
int tmp_work;
#endif
if (netif_msg_rx_err (tp))
if (netif_msg_rx_err (tp))
printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n",
dev->name, rx_status);
tp->stats.rx_errors++;
......@@ -1944,7 +1944,7 @@ static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
RTL_R16 (RxBufAddr),
RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
while (netif_running(dev) && received < budget
while (netif_running(dev) && received < budget
&& (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
u32 ring_offset = cur_rx % RX_BUF_LEN;
u32 rx_status;
......@@ -2031,7 +2031,7 @@ static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
netif_receive_skb (skb);
} else {
if (net_ratelimit())
if (net_ratelimit())
printk (KERN_WARNING
"%s: Memory squeeze, dropping packet.\n",
dev->name);
......@@ -2158,13 +2158,13 @@ static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance,
status = RTL_R16 (IntrStatus);
/* shared irq? */
if (unlikely((status & rtl8139_intr_mask) == 0))
if (unlikely((status & rtl8139_intr_mask) == 0))
goto out;
handled = 1;
/* h/w no longer present (hotplug?) or major error, bail */
if (unlikely(status == 0xFFFF))
if (unlikely(status == 0xFFFF))
goto out;
/* close possible race's with dev_close */
......
......@@ -447,6 +447,7 @@ config MIPS_GT96100ETH
config MIPS_AU1X00_ENET
bool "MIPS AU1000 Ethernet support"
depends on NET_ETHERNET && SOC_AU1X00
select PHYLIB
select CRC32
help
If you have an Alchemy Semi AU1X00 based system
......@@ -865,6 +866,22 @@ config DM9000
<file:Documentation/networking/net-modules.txt>. The module will be
called dm9000.
config SMC911X
tristate "SMSC LAN911[5678] support"
select CRC32
select MII
depends on NET_ETHERNET && ARCH_PXA
help
This is a driver for SMSC's LAN911x series of Ethernet chipsets
including the new LAN9115, LAN9116, LAN9117, and LAN9118.
Say Y if you want it compiled into the kernel,
and read the Ethernet-HOWTO, available from
<http://www.linuxdoc.org/docs.html#howto>.
This driver is also available as a module. The module will be
called smc911x. If you want to compile it as a module, say M
here and read <file:Documentation/modules.txt>
config NET_VENDOR_RACAL
bool "Racal-Interlan (Micom) NI cards"
depends on NET_ETHERNET && ISA
......@@ -2311,6 +2328,23 @@ config S2IO_NAPI
If in doubt, say N.
config MYRI10GE
tristate "Myricom Myri-10G Ethernet support"
depends on PCI
select FW_LOADER
select CRC32
---help---
This driver supports Myricom Myri-10G Dual Protocol interface in
Ethernet mode. If the eeprom on your board is not recent enough,
you will need a newer firmware image.
You may get this image or more information, at:
<http://www.myri.com/Myri-10G/>
To compile this driver as a module, choose M here and read
<file:Documentation/networking/net-modules.txt>. The module
will be called myri10ge.
endmenu
source "drivers/net/tokenring/Kconfig"
......
......@@ -192,7 +192,9 @@ obj-$(CONFIG_R8169) += r8169.o
obj-$(CONFIG_AMD8111_ETH) += amd8111e.o
obj-$(CONFIG_IBMVETH) += ibmveth.o
obj-$(CONFIG_S2IO) += s2io.o
obj-$(CONFIG_MYRI10GE) += myri10ge/
obj-$(CONFIG_SMC91X) += smc91x.o
obj-$(CONFIG_SMC911X) += smc911x.o
obj-$(CONFIG_DM9000) += dm9000.o
obj-$(CONFIG_FEC_8XX) += fec_8xx/
......
此差异已折叠。
......@@ -40,120 +40,6 @@
#define MULTICAST_FILTER_LIMIT 64
/* FIXME
* The PHY defines should be in a separate file.
*/
/* MII register offsets */
#define MII_CONTROL 0x0000
#define MII_STATUS 0x0001
#define MII_PHY_ID0 0x0002
#define MII_PHY_ID1 0x0003
#define MII_ANADV 0x0004
#define MII_ANLPAR 0x0005
#define MII_AEXP 0x0006
#define MII_ANEXT 0x0007
#define MII_LSI_PHY_CONFIG 0x0011
/* Status register */
#define MII_LSI_PHY_STAT 0x0012
#define MII_AMD_PHY_STAT MII_LSI_PHY_STAT
#define MII_INTEL_PHY_STAT 0x0011
#define MII_AUX_CNTRL 0x0018
/* mii registers specific to AMD 79C901 */
#define MII_STATUS_SUMMARY = 0x0018
/* MII Control register bit definitions. */
#define MII_CNTL_FDX 0x0100
#define MII_CNTL_RST_AUTO 0x0200
#define MII_CNTL_ISOLATE 0x0400
#define MII_CNTL_PWRDWN 0x0800
#define MII_CNTL_AUTO 0x1000
#define MII_CNTL_F100 0x2000
#define MII_CNTL_LPBK 0x4000
#define MII_CNTL_RESET 0x8000
/* MII Status register bit */
#define MII_STAT_EXT 0x0001
#define MII_STAT_JAB 0x0002
#define MII_STAT_LINK 0x0004
#define MII_STAT_CAN_AUTO 0x0008
#define MII_STAT_FAULT 0x0010
#define MII_STAT_AUTO_DONE 0x0020
#define MII_STAT_CAN_T 0x0800
#define MII_STAT_CAN_T_FDX 0x1000
#define MII_STAT_CAN_TX 0x2000
#define MII_STAT_CAN_TX_FDX 0x4000
#define MII_STAT_CAN_T4 0x8000
#define MII_ID1_OUI_LO 0xFC00 /* low bits of OUI mask */
#define MII_ID1_MODEL 0x03F0 /* model number */
#define MII_ID1_REV 0x000F /* model number */
/* MII NWAY Register Bits ...
valid for the ANAR (Auto-Negotiation Advertisement) and
ANLPAR (Auto-Negotiation Link Partner) registers */
#define MII_NWAY_NODE_SEL 0x001f
#define MII_NWAY_CSMA_CD 0x0001
#define MII_NWAY_T 0x0020
#define MII_NWAY_T_FDX 0x0040
#define MII_NWAY_TX 0x0080
#define MII_NWAY_TX_FDX 0x0100
#define MII_NWAY_T4 0x0200
#define MII_NWAY_PAUSE 0x0400
#define MII_NWAY_RF 0x2000 /* Remote Fault */
#define MII_NWAY_ACK 0x4000 /* Remote Acknowledge */
#define MII_NWAY_NP 0x8000 /* Next Page (Enable) */
/* mii stsout register bits */
#define MII_STSOUT_LINK_FAIL 0x4000
#define MII_STSOUT_SPD 0x0080
#define MII_STSOUT_DPLX 0x0040
/* mii stsics register bits */
#define MII_STSICS_SPD 0x8000
#define MII_STSICS_DPLX 0x4000
#define MII_STSICS_LINKSTS 0x0001
/* mii stssum register bits */
#define MII_STSSUM_LINK 0x0008
#define MII_STSSUM_DPLX 0x0004
#define MII_STSSUM_AUTO 0x0002
#define MII_STSSUM_SPD 0x0001
/* lsi phy status register */
#define MII_LSI_PHY_STAT_FDX 0x0040
#define MII_LSI_PHY_STAT_SPD 0x0080
/* amd phy status register */
#define MII_AMD_PHY_STAT_FDX 0x0800
#define MII_AMD_PHY_STAT_SPD 0x0400
/* intel phy status register */
#define MII_INTEL_PHY_STAT_FDX 0x0200
#define MII_INTEL_PHY_STAT_SPD 0x4000
/* Auxilliary Control/Status Register */
#define MII_AUX_FDX 0x0001
#define MII_AUX_100 0x0002
#define MII_AUX_F100 0x0004
#define MII_AUX_ANEG 0x0008
typedef struct mii_phy {
struct mii_phy * next;
struct mii_chip_info * chip_info;
u16 status;
u32 *mii_control_reg;
u32 *mii_data_reg;
} mii_phy_t;
struct phy_ops {
int (*phy_init) (struct net_device *, int);
int (*phy_reset) (struct net_device *, int);
int (*phy_status) (struct net_device *, int, u16 *, u16 *);
};
/*
* Data Buffer Descriptor. Data buffers must be aligned on 32 byte
* boundary for both, receive and transmit.
......@@ -200,7 +86,6 @@ typedef struct mac_reg {
struct au1000_private {
db_dest_t *pDBfree;
db_dest_t db[NUM_RX_BUFFS+NUM_TX_BUFFS];
volatile rx_dma_t *rx_dma_ring[NUM_RX_DMA];
......@@ -213,8 +98,15 @@ struct au1000_private {
u32 tx_full;
int mac_id;
mii_phy_t *mii;
struct phy_ops *phy_ops;
int mac_enabled; /* whether MAC is currently enabled and running (req. for mdio) */
int old_link; /* used by au1000_adjust_link */
int old_speed;
int old_duplex;
struct phy_device *phy_dev;
struct mii_bus mii_bus;
/* These variables are just for quick access to certain regs addresses. */
volatile mac_reg_t *mac; /* mac registers */
......@@ -223,14 +115,6 @@ struct au1000_private {
u32 vaddr; /* virtual address of rx/tx buffers */
dma_addr_t dma_addr; /* dma address of rx/tx buffers */
u8 *hash_table;
u32 hash_mode;
u32 intr_work_done; /* number of Rx and Tx pkts processed in the isr */
int phy_addr; /* phy address */
u32 options; /* User-settable misc. driver options. */
u32 drv_flags;
int want_autoneg;
struct net_device_stats stats;
struct timer_list timer;
spinlock_t lock; /* Serialise access to device */
};
......@@ -4877,7 +4877,7 @@ static int __devinit cas_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
static int cas_version_printed = 0;
unsigned long casreg_base, casreg_len;
unsigned long casreg_len;
struct net_device *dev;
struct cas *cp;
int i, err, pci_using_dac;
......@@ -4972,7 +4972,6 @@ static int __devinit cas_init_one(struct pci_dev *pdev,
pci_using_dac = 0;
}
casreg_base = pci_resource_start(pdev, 0);
casreg_len = pci_resource_len(pdev, 0);
cp = netdev_priv(dev);
......@@ -5024,7 +5023,7 @@ static int __devinit cas_init_one(struct pci_dev *pdev,
cp->timer_ticks = 0;
/* give us access to cassini registers */
cp->regs = ioremap(casreg_base, casreg_len);
cp->regs = pci_iomap(pdev, 0, casreg_len);
if (cp->regs == 0UL) {
printk(KERN_ERR PFX "Cannot map device registers, "
"aborting.\n");
......@@ -5123,7 +5122,7 @@ static int __devinit cas_init_one(struct pci_dev *pdev,
cas_shutdown(cp);
mutex_unlock(&cp->pm_mutex);
iounmap(cp->regs);
pci_iounmap(pdev, cp->regs);
err_out_free_res:
......@@ -5171,7 +5170,7 @@ static void __devexit cas_remove_one(struct pci_dev *pdev)
#endif
pci_free_consistent(pdev, sizeof(struct cas_init_block),
cp->init_block, cp->block_dvma);
iounmap(cp->regs);
pci_iounmap(pdev, cp->regs);
free_netdev(dev);
pci_release_regions(pdev);
pci_disable_device(pdev);
......
......@@ -2780,6 +2780,80 @@ static void e100_shutdown(struct pci_dev *pdev)
DPRINTK(PROBE,ERR, "Error enabling wake\n");
}
/* ------------------ PCI Error Recovery infrastructure -------------- */
/**
* e100_io_error_detected - called when PCI error is detected.
* @pdev: Pointer to PCI device
* @state: The current pci conneection state
*/
static pci_ers_result_t e100_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
{
struct net_device *netdev = pci_get_drvdata(pdev);
/* Similar to calling e100_down(), but avoids adpater I/O. */
netdev->stop(netdev);
/* Detach; put netif into state similar to hotplug unplug. */
netif_poll_enable(netdev);
netif_device_detach(netdev);
/* Request a slot reset. */
return PCI_ERS_RESULT_NEED_RESET;
}
/**
* e100_io_slot_reset - called after the pci bus has been reset.
* @pdev: Pointer to PCI device
*
* Restart the card from scratch.
*/
static pci_ers_result_t e100_io_slot_reset(struct pci_dev *pdev)
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct nic *nic = netdev_priv(netdev);
if (pci_enable_device(pdev)) {
printk(KERN_ERR "e100: Cannot re-enable PCI device after reset.\n");
return PCI_ERS_RESULT_DISCONNECT;
}
pci_set_master(pdev);
/* Only one device per card can do a reset */
if (0 != PCI_FUNC(pdev->devfn))
return PCI_ERS_RESULT_RECOVERED;
e100_hw_reset(nic);
e100_phy_init(nic);
return PCI_ERS_RESULT_RECOVERED;
}
/**
* e100_io_resume - resume normal operations
* @pdev: Pointer to PCI device
*
* Resume normal operations after an error recovery
* sequence has been completed.
*/
static void e100_io_resume(struct pci_dev *pdev)
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct nic *nic = netdev_priv(netdev);
/* ack any pending wake events, disable PME */
pci_enable_wake(pdev, 0, 0);
netif_device_attach(netdev);
if (netif_running(netdev)) {
e100_open(netdev);
mod_timer(&nic->watchdog, jiffies);
}
}
static struct pci_error_handlers e100_err_handler = {
.error_detected = e100_io_error_detected,
.slot_reset = e100_io_slot_reset,
.resume = e100_io_resume,
};
static struct pci_driver e100_driver = {
.name = DRV_NAME,
......@@ -2791,6 +2865,7 @@ static struct pci_driver e100_driver = {
.resume = e100_resume,
#endif
.shutdown = e100_shutdown,
.err_handler = &e100_err_handler,
};
static int __init e100_init_module(void)
......
################################################################################
#
#
# Copyright(c) 1999 - 2003 Intel Corporation. All rights reserved.
# Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
......@@ -22,6 +22,7 @@
#
# Contact Information:
# Linux NICS <linux.nics@intel.com>
# e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
# Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
#
################################################################################
......
/*******************************************************************************
Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
......@@ -22,6 +22,7 @@
Contact Information:
Linux NICS <linux.nics@intel.com>
e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*******************************************************************************/
......@@ -114,6 +115,8 @@ struct e1000_adapter;
/* Supported Rx Buffer Sizes */
#define E1000_RXBUFFER_128 128 /* Used for packet split */
#define E1000_RXBUFFER_256 256 /* Used for packet split */
#define E1000_RXBUFFER_512 512
#define E1000_RXBUFFER_1024 1024
#define E1000_RXBUFFER_2048 2048
#define E1000_RXBUFFER_4096 4096
#define E1000_RXBUFFER_8192 8192
......@@ -334,7 +337,6 @@ struct e1000_adapter {
boolean_t have_msi;
#endif
/* to not mess up cache alignment, always add to the bottom */
boolean_t txb2b;
#ifdef NETIF_F_TSO
boolean_t tso_force;
#endif
......
/*******************************************************************************
Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
......@@ -22,6 +22,7 @@
Contact Information:
Linux NICS <linux.nics@intel.com>
e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*******************************************************************************/
......@@ -864,8 +865,8 @@ static int
e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
{
struct net_device *netdev = adapter->netdev;
uint32_t mask, i=0, shared_int = TRUE;
uint32_t irq = adapter->pdev->irq;
uint32_t mask, i=0, shared_int = TRUE;
uint32_t irq = adapter->pdev->irq;
*data = 0;
......@@ -891,22 +892,22 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
/* Interrupt to test */
mask = 1 << i;
if (!shared_int) {
/* Disable the interrupt to be reported in
* the cause register and then force the same
* interrupt and see if one gets posted. If
* an interrupt was posted to the bus, the
* test failed.
*/
adapter->test_icr = 0;
E1000_WRITE_REG(&adapter->hw, IMC, mask);
E1000_WRITE_REG(&adapter->hw, ICS, mask);
msec_delay(10);
if (adapter->test_icr & mask) {
*data = 3;
break;
}
if (!shared_int) {
/* Disable the interrupt to be reported in
* the cause register and then force the same
* interrupt and see if one gets posted. If
* an interrupt was posted to the bus, the
* test failed.
*/
adapter->test_icr = 0;
E1000_WRITE_REG(&adapter->hw, IMC, mask);
E1000_WRITE_REG(&adapter->hw, ICS, mask);
msec_delay(10);
if (adapter->test_icr & mask) {
*data = 3;
break;
}
}
/* Enable the interrupt to be reported in
......@@ -925,7 +926,7 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
break;
}
if (!shared_int) {
if (!shared_int) {
/* Disable the other interrupts to be reported in
* the cause register and then force the other
* interrupts and see if any get posted. If
......
/*******************************************************************************
Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
......@@ -22,6 +22,7 @@
Contact Information:
Linux NICS <linux.nics@intel.com>
e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*******************************************************************************/
......@@ -764,7 +765,7 @@ e1000_init_hw(struct e1000_hw *hw)
}
if (hw->mac_type == e1000_82573) {
e1000_enable_tx_pkt_filtering(hw);
e1000_enable_tx_pkt_filtering(hw);
}
switch (hw->mac_type) {
......@@ -860,7 +861,7 @@ e1000_adjust_serdes_amplitude(struct e1000_hw *hw)
if(eeprom_data != EEPROM_RESERVED_WORD) {
/* Adjust SERDES output amplitude only. */
eeprom_data &= EEPROM_SERDES_AMPLITUDE_MASK;
eeprom_data &= EEPROM_SERDES_AMPLITUDE_MASK;
ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL, eeprom_data);
if(ret_val)
return ret_val;
......@@ -1227,7 +1228,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
if (hw->phy_reset_disable)
return E1000_SUCCESS;
ret_val = e1000_phy_reset(hw);
if (ret_val) {
DEBUGOUT("Error Resetting the PHY\n");
......@@ -1369,7 +1370,7 @@ e1000_copper_link_ggp_setup(struct e1000_hw *hw)
DEBUGFUNC("e1000_copper_link_ggp_setup");
if(!hw->phy_reset_disable) {
/* Enable CRS on TX for half-duplex operation. */
ret_val = e1000_read_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
&phy_data);
......@@ -1518,7 +1519,7 @@ e1000_copper_link_mgp_setup(struct e1000_hw *hw)
if(hw->phy_reset_disable)
return E1000_SUCCESS;
/* Enable CRS on TX. This must be set for half-duplex operation. */
ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
if(ret_val)
......@@ -1664,7 +1665,7 @@ e1000_copper_link_autoneg(struct e1000_hw *hw)
* collision distance in the Transmit Control Register.
* 2) Set up flow control on the MAC to that established with
* the link partner.
* 3) Config DSP to improve Gigabit link quality for some PHY revisions.
* 3) Config DSP to improve Gigabit link quality for some PHY revisions.
*
* hw - Struct containing variables accessed by shared code
******************************************************************************/
......@@ -1673,7 +1674,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw)
{
int32_t ret_val;
DEBUGFUNC("e1000_copper_link_postconfig");
if(hw->mac_type >= e1000_82544) {
e1000_config_collision_dist(hw);
} else {
......@@ -1697,7 +1698,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw)
return ret_val;
}
}
return E1000_SUCCESS;
}
......@@ -1753,11 +1754,11 @@ e1000_setup_copper_link(struct e1000_hw *hw)
}
if(hw->autoneg) {
/* Setup autoneg and flow control advertisement
* and perform autonegotiation */
/* Setup autoneg and flow control advertisement
* and perform autonegotiation */
ret_val = e1000_copper_link_autoneg(hw);
if(ret_val)
return ret_val;
return ret_val;
} else {
/* PHY will be set to 10H, 10F, 100H,or 100F
* depending on value from forced_speed_duplex. */
......@@ -1785,7 +1786,7 @@ e1000_setup_copper_link(struct e1000_hw *hw)
ret_val = e1000_copper_link_postconfig(hw);
if(ret_val)
return ret_val;
DEBUGOUT("Valid link established!!!\n");
return E1000_SUCCESS;
}
......@@ -1983,7 +1984,7 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw)
DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg);
ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg);
if(ret_val)
return ret_val;
......@@ -2272,7 +2273,7 @@ e1000_config_mac_to_phy(struct e1000_hw *hw)
DEBUGFUNC("e1000_config_mac_to_phy");
/* 82544 or newer MAC, Auto Speed Detection takes care of
/* 82544 or newer MAC, Auto Speed Detection takes care of
* MAC speed/duplex configuration.*/
if (hw->mac_type >= e1000_82544)
return E1000_SUCCESS;
......@@ -2291,9 +2292,9 @@ e1000_config_mac_to_phy(struct e1000_hw *hw)
if(ret_val)
return ret_val;
if(phy_data & M88E1000_PSSR_DPLX)
if(phy_data & M88E1000_PSSR_DPLX)
ctrl |= E1000_CTRL_FD;
else
else
ctrl &= ~E1000_CTRL_FD;
e1000_config_collision_dist(hw);
......@@ -2492,10 +2493,10 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
*/
if(hw->original_fc == e1000_fc_full) {
hw->fc = e1000_fc_full;
DEBUGOUT("Flow Control = FULL.\r\n");
DEBUGOUT("Flow Control = FULL.\n");
} else {
hw->fc = e1000_fc_rx_pause;
DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n");
DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
}
}
/* For receiving PAUSE frames ONLY.
......@@ -2511,7 +2512,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
hw->fc = e1000_fc_tx_pause;
DEBUGOUT("Flow Control = TX PAUSE frames only.\r\n");
DEBUGOUT("Flow Control = TX PAUSE frames only.\n");
}
/* For transmitting PAUSE frames ONLY.
*
......@@ -2526,7 +2527,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
!(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
hw->fc = e1000_fc_rx_pause;
DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n");
DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
}
/* Per the IEEE spec, at this point flow control should be
* disabled. However, we want to consider that we could
......@@ -2552,10 +2553,10 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
hw->original_fc == e1000_fc_tx_pause) ||
hw->fc_strict_ieee) {
hw->fc = e1000_fc_none;
DEBUGOUT("Flow Control = NONE.\r\n");
DEBUGOUT("Flow Control = NONE.\n");
} else {
hw->fc = e1000_fc_rx_pause;
DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n");
DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
}
/* Now we need to do one last check... If we auto-
......@@ -2580,7 +2581,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
return ret_val;
}
} else {
DEBUGOUT("Copper PHY and Auto Neg has not completed.\r\n");
DEBUGOUT("Copper PHY and Auto Neg has not completed.\n");
}
}
return E1000_SUCCESS;
......@@ -2763,7 +2764,7 @@ e1000_check_for_link(struct e1000_hw *hw)
hw->autoneg_failed = 1;
return 0;
}
DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\r\n");
DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
/* Disable auto-negotiation in the TXCW register */
E1000_WRITE_REG(hw, TXCW, (hw->txcw & ~E1000_TXCW_ANE));
......@@ -2788,7 +2789,7 @@ e1000_check_for_link(struct e1000_hw *hw)
else if(((hw->media_type == e1000_media_type_fiber) ||
(hw->media_type == e1000_media_type_internal_serdes)) &&
(ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\r\n");
DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
E1000_WRITE_REG(hw, TXCW, hw->txcw);
E1000_WRITE_REG(hw, CTRL, (ctrl & ~E1000_CTRL_SLU));
......@@ -2851,13 +2852,13 @@ e1000_get_speed_and_duplex(struct e1000_hw *hw,
if(status & E1000_STATUS_FD) {
*duplex = FULL_DUPLEX;
DEBUGOUT("Full Duplex\r\n");
DEBUGOUT("Full Duplex\n");
} else {
*duplex = HALF_DUPLEX;
DEBUGOUT(" Half Duplex\r\n");
DEBUGOUT(" Half Duplex\n");
}
} else {
DEBUGOUT("1000 Mbs, Full Duplex\r\n");
DEBUGOUT("1000 Mbs, Full Duplex\n");
*speed = SPEED_1000;
*duplex = FULL_DUPLEX;
}
......@@ -2883,7 +2884,7 @@ e1000_get_speed_and_duplex(struct e1000_hw *hw,
}
}
if ((hw->mac_type == e1000_80003es2lan) &&
if ((hw->mac_type == e1000_80003es2lan) &&
(hw->media_type == e1000_media_type_copper)) {
if (*speed == SPEED_1000)
ret_val = e1000_configure_kmrn_for_1000(hw);
......@@ -3159,7 +3160,7 @@ e1000_read_phy_reg(struct e1000_hw *hw,
if (e1000_swfw_sync_acquire(hw, swfw))
return -E1000_ERR_SWFW_SYNC;
if((hw->phy_type == e1000_phy_igp ||
if((hw->phy_type == e1000_phy_igp ||
hw->phy_type == e1000_phy_igp_2) &&
(reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
......@@ -3298,7 +3299,7 @@ e1000_write_phy_reg(struct e1000_hw *hw,
if (e1000_swfw_sync_acquire(hw, swfw))
return -E1000_ERR_SWFW_SYNC;
if((hw->phy_type == e1000_phy_igp ||
if((hw->phy_type == e1000_phy_igp ||
hw->phy_type == e1000_phy_igp_2) &&
(reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
......@@ -3496,22 +3497,22 @@ e1000_phy_hw_reset(struct e1000_hw *hw)
}
/* Read the device control register and assert the E1000_CTRL_PHY_RST
* bit. Then, take it out of reset.
* For pre-e1000_82571 hardware, we delay for 10ms between the assert
* For pre-e1000_82571 hardware, we delay for 10ms between the assert
* and deassert. For e1000_82571 hardware and later, we instead delay
* for 50us between and 10ms after the deassertion.
*/
ctrl = E1000_READ_REG(hw, CTRL);
E1000_WRITE_REG(hw, CTRL, ctrl | E1000_CTRL_PHY_RST);
E1000_WRITE_FLUSH(hw);
if (hw->mac_type < e1000_82571)
if (hw->mac_type < e1000_82571)
msec_delay(10);
else
udelay(100);
E1000_WRITE_REG(hw, CTRL, ctrl);
E1000_WRITE_FLUSH(hw);
if (hw->mac_type >= e1000_82571)
msec_delay(10);
e1000_swfw_sync_release(hw, swfw);
......@@ -3815,7 +3816,7 @@ e1000_phy_m88_get_info(struct e1000_hw *hw,
/* Check polarity status */
ret_val = e1000_check_polarity(hw, &polarity);
if(ret_val)
return ret_val;
return ret_val;
phy_info->cable_polarity = polarity;
ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
......@@ -4540,14 +4541,14 @@ e1000_read_eeprom_eerd(struct e1000_hw *hw,
E1000_WRITE_REG(hw, EERD, eerd);
error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_READ);
if(error) {
break;
}
data[i] = (E1000_READ_REG(hw, EERD) >> E1000_EEPROM_RW_REG_DATA);
}
return error;
}
......@@ -4573,24 +4574,24 @@ e1000_write_eeprom_eewr(struct e1000_hw *hw,
return -E1000_ERR_SWFW_SYNC;
for (i = 0; i < words; i++) {
register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) |
((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) |
register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) |
((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) |
E1000_EEPROM_RW_REG_START;
error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE);
if(error) {
break;
}
}
E1000_WRITE_REG(hw, EEWR, register_value);
error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE);
if(error) {
break;
}
}
}
e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM);
return error;
}
......@@ -4610,7 +4611,7 @@ e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd)
for(i = 0; i < attempts; i++) {
if(eerd == E1000_EEPROM_POLL_READ)
reg = E1000_READ_REG(hw, EERD);
else
else
reg = E1000_READ_REG(hw, EEWR);
if(reg & E1000_EEPROM_RW_REG_DONE) {
......@@ -5135,7 +5136,7 @@ e1000_mc_addr_list_update(struct e1000_hw *hw,
uint32_t i;
uint32_t num_rar_entry;
uint32_t num_mta_entry;
DEBUGFUNC("e1000_mc_addr_list_update");
/* Set the new number of MC addresses that we are being requested to use. */
......@@ -6240,7 +6241,7 @@ e1000_check_polarity(struct e1000_hw *hw,
* 1 - Downshift ocured.
*
* returns: - E1000_ERR_XXX
* E1000_SUCCESS
* E1000_SUCCESS
*
* For phy's older then IGP, this function reads the Downshift bit in the Phy
* Specific Status register. For IGP phy's, it reads the Downgrade bit in the
......@@ -6255,7 +6256,7 @@ e1000_check_downshift(struct e1000_hw *hw)
DEBUGFUNC("e1000_check_downshift");
if(hw->phy_type == e1000_phy_igp ||
if(hw->phy_type == e1000_phy_igp ||
hw->phy_type == e1000_phy_igp_2) {
ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH,
&phy_data);
......@@ -6684,8 +6685,8 @@ e1000_set_d0_lplu_state(struct e1000_hw *hw,
} else {
phy_data |= IGP02E1000_PM_D0_LPLU;
phy_data |= IGP02E1000_PM_D0_LPLU;
ret_val = e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
if (ret_val)
return ret_val;
......@@ -6777,7 +6778,7 @@ int32_t
e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer)
{
uint8_t i;
uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET;
uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET;
uint8_t length = E1000_MNG_DHCP_COOKIE_LENGTH;
length = (length >> 2);
......@@ -6796,7 +6797,7 @@ e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer)
* and also checks whether the previous command is completed.
* It busy waits in case of previous command is not completed.
*
* returns: - E1000_ERR_HOST_INTERFACE_COMMAND in case if is not ready or
* returns: - E1000_ERR_HOST_INTERFACE_COMMAND in case if is not ready or
* timeout
* - E1000_SUCCESS for success.
****************************************************************************/
......@@ -6820,7 +6821,7 @@ e1000_mng_enable_host_if(struct e1000_hw * hw)
msec_delay_irq(1);
}
if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
DEBUGOUT("Previous command timeout failed .\n");
return -E1000_ERR_HOST_INTERFACE_COMMAND;
}
......
/*******************************************************************************
Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
......@@ -22,6 +22,7 @@
Contact Information:
Linux NICS <linux.nics@intel.com>
e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*******************************************************************************/
......@@ -374,7 +375,7 @@ struct e1000_host_mng_dhcp_cookie{
};
#endif
int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer,
int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer,
uint16_t length);
boolean_t e1000_check_mng_mode(struct e1000_hw *hw);
boolean_t e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
......@@ -1801,7 +1802,7 @@ struct e1000_hw {
* value2 = [0..64512], default=4096
* value3 = [0..64512], default=0
*/
#define E1000_PSRCTL_BSIZE0_MASK 0x0000007F
#define E1000_PSRCTL_BSIZE1_MASK 0x00003F00
#define E1000_PSRCTL_BSIZE2_MASK 0x003F0000
......
此差异已折叠。
/*******************************************************************************
Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
......@@ -22,6 +22,7 @@
Contact Information:
Linux NICS <linux.nics@intel.com>
e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*******************************************************************************/
......
/*******************************************************************************
Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
......@@ -22,6 +22,7 @@
Contact Information:
Linux NICS <linux.nics@intel.com>
e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*******************************************************************************/
......
......@@ -21,15 +21,15 @@
http://www.scyld.com/network/epic100.html
---------------------------------------------------------------------
Linux kernel-specific changes:
LK1.1.2 (jgarzik):
* Merge becker version 1.09 (4/08/2000)
LK1.1.3:
* Major bugfix to 1.09 driver (Francis Romieu)
LK1.1.4 (jgarzik):
* Merge becker test version 1.09 (5/29/2000)
......@@ -66,7 +66,7 @@
LK1.1.14 (Kryzsztof Halasa):
* fix spurious bad initializations
* pound phy a la SMSC's app note on the subject
AC1.1.14ac
* fix power up/down for ethtool that broke in 1.11
......@@ -244,7 +244,7 @@ static struct pci_device_id epic_pci_tbl[] = {
};
MODULE_DEVICE_TABLE (pci, epic_pci_tbl);
#ifndef USE_IO_OPS
#undef inb
#undef inw
......@@ -370,7 +370,7 @@ static int epic_close(struct net_device *dev);
static struct net_device_stats *epic_get_stats(struct net_device *dev);
static void set_rx_mode(struct net_device *dev);
static int __devinit epic_init_one (struct pci_dev *pdev,
const struct pci_device_id *ent)
......@@ -392,9 +392,9 @@ static int __devinit epic_init_one (struct pci_dev *pdev,
printk (KERN_INFO "%s" KERN_INFO "%s" KERN_INFO "%s",
version, version2, version3);
#endif
card_idx++;
ret = pci_enable_device(pdev);
if (ret)
goto out;
......@@ -405,7 +405,7 @@ static int __devinit epic_init_one (struct pci_dev *pdev,
ret = -ENODEV;
goto err_out_disable;
}
pci_set_master(pdev);
ret = pci_request_regions(pdev, DRV_NAME);
......@@ -498,7 +498,7 @@ static int __devinit epic_init_one (struct pci_dev *pdev,
ep->pci_dev = pdev;
ep->chip_id = chip_idx;
ep->chip_flags = pci_id_tbl[chip_idx].drv_flags;
ep->irq_mask =
ep->irq_mask =
(ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170)
| CntFull | TxUnderrun | EpicNapiEvent;
......@@ -587,7 +587,7 @@ static int __devinit epic_init_one (struct pci_dev *pdev,
pci_disable_device(pdev);
goto out;
}
/* Serial EEPROM section. */
/* EEPROM_Ctrl bits. */
......@@ -709,7 +709,7 @@ static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
outw(value, ioaddr + MIIData);
outl((phy_id << 9) | (loc << 4) | MII_WRITEOP, ioaddr + MIICtrl);
for (i = 10000; i > 0; i--) {
for (i = 10000; i > 0; i--) {
barrier();
if ((inl(ioaddr + MIICtrl) & MII_WRITEOP) == 0)
break;
......@@ -717,7 +717,7 @@ static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
return;
}
static int epic_open(struct net_device *dev)
{
struct epic_private *ep = dev->priv;
......@@ -760,7 +760,7 @@ static int epic_open(struct net_device *dev)
#endif
udelay(20); /* Looks like EPII needs that if you want reliable RX init. FIXME: pci posting bug? */
for (i = 0; i < 3; i++)
outl(cpu_to_le16(((u16*)dev->dev_addr)[i]), ioaddr + LAN0 + i*4);
......@@ -803,7 +803,7 @@ static int epic_open(struct net_device *dev)
/* Enable interrupts by setting the interrupt mask. */
outl((ep->chip_flags & TYPE2_INTR ? PCIBusErr175 : PCIBusErr170)
| CntFull | TxUnderrun
| CntFull | TxUnderrun
| RxError | RxHeader | EpicNapiEvent, ioaddr + INTMASK);
if (debug > 1)
......@@ -831,7 +831,7 @@ static void epic_pause(struct net_device *dev)
struct epic_private *ep = dev->priv;
netif_stop_queue (dev);
/* Disable interrupts by clearing the interrupt mask. */
outl(0x00000000, ioaddr + INTMASK);
/* Stop the chip's Tx and Rx DMA processes. */
......@@ -987,7 +987,7 @@ static void epic_init_ring(struct net_device *dev)
for (i = 0; i < RX_RING_SIZE; i++) {
ep->rx_ring[i].rxstatus = 0;
ep->rx_ring[i].buflength = cpu_to_le32(ep->rx_buf_sz);
ep->rx_ring[i].next = ep->rx_ring_dma +
ep->rx_ring[i].next = ep->rx_ring_dma +
(i+1)*sizeof(struct epic_rx_desc);
ep->rx_skbuff[i] = NULL;
}
......@@ -1002,7 +1002,7 @@ static void epic_init_ring(struct net_device *dev)
break;
skb->dev = dev; /* Mark as being used by this device. */
skb_reserve(skb, 2); /* 16 byte align the IP header. */
ep->rx_ring[i].bufaddr = pci_map_single(ep->pci_dev,
ep->rx_ring[i].bufaddr = pci_map_single(ep->pci_dev,
skb->data, ep->rx_buf_sz, PCI_DMA_FROMDEVICE);
ep->rx_ring[i].rxstatus = cpu_to_le32(DescOwn);
}
......@@ -1013,7 +1013,7 @@ static void epic_init_ring(struct net_device *dev)
for (i = 0; i < TX_RING_SIZE; i++) {
ep->tx_skbuff[i] = NULL;
ep->tx_ring[i].txstatus = 0x0000;
ep->tx_ring[i].next = ep->tx_ring_dma +
ep->tx_ring[i].next = ep->tx_ring_dma +
(i+1)*sizeof(struct epic_tx_desc);
}
ep->tx_ring[i-1].next = ep->tx_ring_dma;
......@@ -1026,7 +1026,7 @@ static int epic_start_xmit(struct sk_buff *skb, struct net_device *dev)
int entry, free_count;
u32 ctrl_word;
unsigned long flags;
if (skb->len < ETH_ZLEN) {
skb = skb_padto(skb, ETH_ZLEN);
if (skb == NULL)
......@@ -1042,7 +1042,7 @@ static int epic_start_xmit(struct sk_buff *skb, struct net_device *dev)
entry = ep->cur_tx % TX_RING_SIZE;
ep->tx_skbuff[entry] = skb;
ep->tx_ring[entry].bufaddr = pci_map_single(ep->pci_dev, skb->data,
ep->tx_ring[entry].bufaddr = pci_map_single(ep->pci_dev, skb->data,
skb->len, PCI_DMA_TODEVICE);
if (free_count < TX_QUEUE_LEN/2) {/* Typical path */
ctrl_word = cpu_to_le32(0x100000); /* No interrupt */
......@@ -1126,7 +1126,7 @@ static void epic_tx(struct net_device *dev, struct epic_private *ep)
/* Free the original skb. */
skb = ep->tx_skbuff[entry];
pci_unmap_single(ep->pci_dev, ep->tx_ring[entry].bufaddr,
pci_unmap_single(ep->pci_dev, ep->tx_ring[entry].bufaddr,
skb->len, PCI_DMA_TODEVICE);
dev_kfree_skb_irq(skb);
ep->tx_skbuff[entry] = NULL;
......@@ -1281,8 +1281,8 @@ static int epic_rx(struct net_device *dev, int budget)
ep->rx_buf_sz,
PCI_DMA_FROMDEVICE);
} else {
pci_unmap_single(ep->pci_dev,
ep->rx_ring[entry].bufaddr,
pci_unmap_single(ep->pci_dev,
ep->rx_ring[entry].bufaddr,
ep->rx_buf_sz, PCI_DMA_FROMDEVICE);
skb_put(skb = ep->rx_skbuff[entry], pkt_len);
ep->rx_skbuff[entry] = NULL;
......@@ -1307,7 +1307,7 @@ static int epic_rx(struct net_device *dev, int budget)
break;
skb->dev = dev; /* Mark as being used by this device. */
skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
ep->rx_ring[entry].bufaddr = pci_map_single(ep->pci_dev,
ep->rx_ring[entry].bufaddr = pci_map_single(ep->pci_dev,
skb->data, ep->rx_buf_sz, PCI_DMA_FROMDEVICE);
work_done++;
}
......@@ -1403,7 +1403,7 @@ static int epic_close(struct net_device *dev)
ep->rx_ring[i].rxstatus = 0; /* Not owned by Epic chip. */
ep->rx_ring[i].buflength = 0;
if (skb) {
pci_unmap_single(ep->pci_dev, ep->rx_ring[i].bufaddr,
pci_unmap_single(ep->pci_dev, ep->rx_ring[i].bufaddr,
ep->rx_buf_sz, PCI_DMA_FROMDEVICE);
dev_kfree_skb(skb);
}
......@@ -1414,7 +1414,7 @@ static int epic_close(struct net_device *dev)
ep->tx_skbuff[i] = NULL;
if (!skb)
continue;
pci_unmap_single(ep->pci_dev, ep->tx_ring[i].bufaddr,
pci_unmap_single(ep->pci_dev, ep->tx_ring[i].bufaddr,
skb->len, PCI_DMA_TODEVICE);
dev_kfree_skb(skb);
}
......@@ -1607,7 +1607,7 @@ static void __devexit epic_remove_one (struct pci_dev *pdev)
{
struct net_device *dev = pci_get_drvdata(pdev);
struct epic_private *ep = dev->priv;
pci_free_consistent(pdev, TX_TOTAL_SIZE, ep->tx_ring, ep->tx_ring_dma);
pci_free_consistent(pdev, RX_TOTAL_SIZE, ep->rx_ring, ep->rx_ring_dma);
unregister_netdev(dev);
......
此差异已折叠。
......@@ -446,7 +446,7 @@ MODULE_LICENSE("GPL");
/* This is set up so that only a single autoprobe takes place per call.
ISA device autoprobes on a running machine are not recommended. */
int
int __init
init_module(void)
{
struct net_device *dev;
......
......@@ -384,7 +384,7 @@ hp_block_output(struct net_device *dev, int count,
}
/* This function resets the ethercard if something screws up. */
static void
static void __init
hp_init_card(struct net_device *dev)
{
int irq = dev->irq;
......@@ -409,7 +409,7 @@ MODULE_LICENSE("GPL");
/* This is set up so that only a single autoprobe takes place per call.
ISA device autoprobes on a running machine are not recommended. */
int
int __init
init_module(void)
{
struct net_device *dev;
......
/*
/*
net-3-driver for the IBM LAN Adapter/A
This is an extension to the Linux operating system, and is covered by the
......@@ -11,9 +11,9 @@ This driver is based both on the SK_MCA driver, which is itself based on the
SK_G16 and 3C523 driver.
paper sources:
'PC Hardware: Aufbau, Funktionsweise, Programmierung' by
'PC Hardware: Aufbau, Funktionsweise, Programmierung' by
Hans-Peter Messmer for the basic Microchannel stuff
'Linux Geraetetreiber' by Allesandro Rubini, Kalle Dalheimer
for help on Ethernet driver programming
......@@ -27,14 +27,14 @@ paper sources:
special acknowledgements to:
- Bob Eager for helping me out with documentation from IBM
- Jim Shorney for his endless patience with me while I was using
- Jim Shorney for his endless patience with me while I was using
him as a beta tester to trace down the address filter bug ;-)
Missing things:
-> set debug level via ioctl instead of compile-time switches
-> I didn't follow the development of the 2.1.x kernels, so my
assumptions about which things changed with which kernel version
assumptions about which things changed with which kernel version
are probably nonsense
History:
......@@ -275,7 +275,7 @@ static void InitDscrs(struct net_device *dev)
priv->rrastart = raddr = priv->txbufstart + (TXBUFCNT * PKTSIZE);
priv->rdastart = addr = priv->rrastart + (priv->rxbufcnt * sizeof(rra_t));
priv->rxbufstart = baddr = priv->rdastart + (priv->rxbufcnt * sizeof(rda_t));
for (z = 0; z < priv->rxbufcnt; z++) {
rra.startlo = baddr;
rra.starthi = 0;
......@@ -570,7 +570,7 @@ static void irqrx_handler(struct net_device *dev)
lrdaaddr = priv->rdastart + (priv->lastrxdescr * sizeof(rda_t));
memcpy_fromio(&rda, priv->base + rdaaddr, sizeof(rda_t));
/* iron out upper word halves of fields we use - SONIC will duplicate
/* iron out upper word halves of fields we use - SONIC will duplicate
bits 0..15 to 16..31 */
rda.status &= 0xffff;
......@@ -836,9 +836,9 @@ static int ibmlana_tx(struct sk_buff *skb, struct net_device *dev)
baddr = priv->txbufstart + (priv->nexttxdescr * PKTSIZE);
memcpy_toio(priv->base + baddr, skb->data, skb->len);
/* copy filler into RAM - in case we're filling up...
/* copy filler into RAM - in case we're filling up...
we're filling a bit more than necessary, but that doesn't harm
since the buffer is far larger...
since the buffer is far larger...
Sorry Linus for the filler string but I couldn't resist ;-) */
if (tmplen > skb->len) {
......@@ -952,7 +952,7 @@ static int ibmlana_probe(struct net_device *dev)
priv->realirq = irq;
priv->medium = medium;
spin_lock_init(&priv->lock);
/* set base + irq for this device (irq not allocated so far) */
......
......@@ -17,7 +17,7 @@
/* media enumeration - defined in a way that it fits onto the LAN/A's
POS registers... */
typedef enum {
typedef enum {
Media_10BaseT, Media_10Base5,
Media_Unknown, Media_10Base2, Media_Count
} ibmlana_medium;
......@@ -27,7 +27,7 @@ typedef enum {
typedef struct {
unsigned int slot; /* MCA-Slot-# */
struct net_device_stats stat; /* packet statistics */
int realirq; /* memorizes actual IRQ, even when
int realirq; /* memorizes actual IRQ, even when
currently not allocated */
ibmlana_medium medium; /* physical cannector */
u32 tdastart, txbufstart, /* addresses */
......@@ -41,7 +41,7 @@ typedef struct {
spinlock_t lock;
} ibmlana_priv;
/* this card uses quite a lot of I/O ports...luckily the MCA bus decodes
/* this card uses quite a lot of I/O ports...luckily the MCA bus decodes
a full 64K I/O range... */
#define IBM_LANA_IORANGE 0xa0
......
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......@@ -75,10 +75,13 @@
#define IbmVethNumBufferPools 5
#define IBMVETH_BUFF_OH 22 /* Overhead: 14 ethernet header + 8 opaque handle */
#define IBMVETH_MAX_MTU 68
#define IBMVETH_MAX_POOL_COUNT 4096
#define IBMVETH_MAX_BUF_SIZE (1024 * 128)
/* pool_size should be sorted */
static int pool_size[] = { 512, 1024 * 2, 1024 * 16, 1024 * 32, 1024 * 64 };
static int pool_count[] = { 256, 768, 256, 256, 256 };
static int pool_active[] = { 1, 1, 0, 0, 0};
#define IBM_VETH_INVALID_MAP ((u16)0xffff)
......@@ -94,6 +97,7 @@ struct ibmveth_buff_pool {
dma_addr_t *dma_addr;
struct sk_buff **skbuff;
int active;
struct kobject kobj;
};
struct ibmveth_rx_q {
......@@ -118,6 +122,7 @@ struct ibmveth_adapter {
dma_addr_t filter_list_dma;
struct ibmveth_buff_pool rx_buff_pool[IbmVethNumBufferPools];
struct ibmveth_rx_q rx_queue;
int pool_config;
/* adapter specific stats */
u64 replenish_task_cycles;
......@@ -134,7 +139,7 @@ struct ibmveth_adapter {
spinlock_t stats_lock;
};
struct ibmveth_buf_desc_fields {
struct ibmveth_buf_desc_fields {
u32 valid : 1;
u32 toggle : 1;
u32 reserved : 6;
......@@ -143,7 +148,7 @@ struct ibmveth_buf_desc_fields {
};
union ibmveth_buf_desc {
u64 desc;
u64 desc;
struct ibmveth_buf_desc_fields fields;
};
......
################################################################################
#
#
# Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved.
# Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
......
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/*******************************************************************************
Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
......
/*******************************************************************************
Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
......
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/*******************************************************************************
Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
This program is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the Free
......
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#
# Makefile for the Myricom Myri-10G ethernet driver
#
obj-$(CONFIG_MYRI10GE) += myri10ge.o
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