提交 1eb94d44 编写于 作者: S Surendra Mobiya 提交者: David S. Miller

cxgb4: collect ASIC LA dumps from ULP TX

Signed-off-by: NSurendra Mobiya <surendra@chelsio.com>
Signed-off-by: NRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: NGanesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 1222d15a
......@@ -281,12 +281,18 @@ struct cudbg_tid_data {
#define CUDBG_NUM_ULPTX 11
#define CUDBG_NUM_ULPTX_READ 512
#define CUDBG_NUM_ULPTX_ASIC 6
#define CUDBG_NUM_ULPTX_ASIC_READ 128
#define CUDBG_ULPTX_LA_REV 1
struct cudbg_ulptx_la {
u32 rdptr[CUDBG_NUM_ULPTX];
u32 wrptr[CUDBG_NUM_ULPTX];
u32 rddata[CUDBG_NUM_ULPTX];
u32 rd_data[CUDBG_NUM_ULPTX][CUDBG_NUM_ULPTX_READ];
u32 rdptr_asic[CUDBG_NUM_ULPTX_ASIC_READ];
u32 rddata_asic[CUDBG_NUM_ULPTX_ASIC_READ][CUDBG_NUM_ULPTX_ASIC];
};
#define CUDBG_CHAC_PBT_ADDR 0x2800
......
......@@ -2586,15 +2586,24 @@ int cudbg_collect_ulptx_la(struct cudbg_init *pdbg_init,
struct adapter *padap = pdbg_init->adap;
struct cudbg_buffer temp_buff = { 0 };
struct cudbg_ulptx_la *ulptx_la_buff;
struct cudbg_ver_hdr *ver_hdr;
u32 i, j;
int rc;
rc = cudbg_get_buff(pdbg_init, dbg_buff, sizeof(struct cudbg_ulptx_la),
rc = cudbg_get_buff(pdbg_init, dbg_buff,
sizeof(struct cudbg_ver_hdr) +
sizeof(struct cudbg_ulptx_la),
&temp_buff);
if (rc)
return rc;
ulptx_la_buff = (struct cudbg_ulptx_la *)temp_buff.data;
ver_hdr = (struct cudbg_ver_hdr *)temp_buff.data;
ver_hdr->signature = CUDBG_ENTITY_SIGNATURE;
ver_hdr->revision = CUDBG_ULPTX_LA_REV;
ver_hdr->size = sizeof(struct cudbg_ulptx_la);
ulptx_la_buff = (struct cudbg_ulptx_la *)(temp_buff.data +
sizeof(*ver_hdr));
for (i = 0; i < CUDBG_NUM_ULPTX; i++) {
ulptx_la_buff->rdptr[i] = t4_read_reg(padap,
ULP_TX_LA_RDPTR_0_A +
......@@ -2610,6 +2619,25 @@ int cudbg_collect_ulptx_la(struct cudbg_init *pdbg_init,
t4_read_reg(padap,
ULP_TX_LA_RDDATA_0_A + 0x10 * i);
}
for (i = 0; i < CUDBG_NUM_ULPTX_ASIC_READ; i++) {
t4_write_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A, 0x1);
ulptx_la_buff->rdptr_asic[i] =
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A);
ulptx_la_buff->rddata_asic[i][0] =
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_0_A);
ulptx_la_buff->rddata_asic[i][1] =
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_1_A);
ulptx_la_buff->rddata_asic[i][2] =
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_2_A);
ulptx_la_buff->rddata_asic[i][3] =
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_3_A);
ulptx_la_buff->rddata_asic[i][4] =
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_4_A);
ulptx_la_buff->rddata_asic[i][5] =
t4_read_reg(padap, PM_RX_BASE_ADDR);
}
return cudbg_write_and_release_buff(pdbg_init, &temp_buff, dbg_buff);
}
......
......@@ -273,7 +273,8 @@ static u32 cxgb4_get_entity_length(struct adapter *adap, u32 entity)
}
break;
case CUDBG_ULPTX_LA:
len = sizeof(struct cudbg_ulptx_la);
len = sizeof(struct cudbg_ver_hdr) +
sizeof(struct cudbg_ulptx_la);
break;
case CUDBG_UP_CIM_INDIRECT:
n = 0;
......
......@@ -1683,6 +1683,16 @@
#define ULP_TX_LA_RDPTR_0_A 0x8ec0
#define ULP_TX_LA_RDDATA_0_A 0x8ec4
#define ULP_TX_LA_WRPTR_0_A 0x8ec8
#define ULP_TX_ASIC_DEBUG_CTRL_A 0x8f70
#define ULP_TX_ASIC_DEBUG_0_A 0x8f74
#define ULP_TX_ASIC_DEBUG_1_A 0x8f78
#define ULP_TX_ASIC_DEBUG_2_A 0x8f7c
#define ULP_TX_ASIC_DEBUG_3_A 0x8f80
#define ULP_TX_ASIC_DEBUG_4_A 0x8f84
/* registers for module PM_RX */
#define PM_RX_BASE_ADDR 0x8fc0
#define PMRX_E_PCMD_PAR_ERROR_S 0
#define PMRX_E_PCMD_PAR_ERROR_V(x) ((x) << PMRX_E_PCMD_PAR_ERROR_S)
......
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