x86: poll waiting for I/OAT DMA channel status
For certain system configurations a 5 usec udelay before checking I/OAT DMA channel status is sometimes not sufficient, resulting in a false failure status and unnecessary freeing of channel resources. Conversely, for many configurations 5 usec is longer than necessary. Loop for up to 20 usec waiting for successful status before failing. Signed-off-by: NDimitri Sivanich <sivanich@sgi.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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