drm/nouveau/gr/gf100-: virtualise r419e00

Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c

@@ -1430,6 +1430,8 @@ gf100_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)
 		grctx->r418800(gr);
 	if (grctx->r419eb0)
 		grctx->r419eb0(gr);
+	if (grctx->r419e00)
+		grctx->r419e00(gr);
 }
 
 #define CB_RESERVED 0x80000

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h

@@ -67,6 +67,7 @@ struct gf100_grctx_func {
 	void (*r419cb8)(struct gf100_gr *);
 	void (*r418800)(struct gf100_gr *);
 	void (*r419eb0)(struct gf100_gr *);
+	void (*r419e00)(struct gf100_gr *);
 };
 
 extern const struct gf100_grctx_func gf100_grctx;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c

@@ -860,6 +860,16 @@ gm107_grctx_pack_ppc[] = {
  * PGRAPH context implementation
  ******************************************************************************/
 
+static void
+gm107_grctx_generate_r419e00(struct gf100_gr *gr)
+{
+	struct nvkm_device *device = gr->base.engine.subdev.device;
+	nvkm_mask(device, 0x419e00, 0x00808080, 0x00808080);
+	nvkm_mask(device, 0x419ccc, 0x80000000, 0x80000000);
+	nvkm_mask(device, 0x419f80, 0x80000000, 0x80000000);
+	nvkm_mask(device, 0x419f88, 0x80000000, 0x80000000);
+}
+
 void
 gm107_grctx_generate_bundle(struct gf100_grctx *info)
 {
@@ -971,10 +981,7 @@ gm107_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)
 	nvkm_wr32(device, 0x404154, idle_timeout);
 	gf100_gr_mthd(gr, grctx->mthd);
 
-	nvkm_mask(device, 0x419e00, 0x00808080, 0x00808080);
-	nvkm_mask(device, 0x419ccc, 0x80000000, 0x80000000);
-	nvkm_mask(device, 0x419f80, 0x80000000, 0x80000000);
-	nvkm_mask(device, 0x419f88, 0x80000000, 0x80000000);
+	grctx->r419e00(gr);
 }
 
 const struct gf100_grctx_func
@@ -1006,4 +1013,5 @@ gm107_grctx = {
 	.dist_skip_table = gf117_grctx_generate_dist_skip_table,
 	.r406500 = gm107_grctx_generate_r406500,
 	.gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,
+	.r419e00 = gm107_grctx_generate_r419e00,
 };