提交 12ecf56d 编写于 作者: S Sylwester Nawrocki 提交者: Mauro Carvalho Chehab

[media] s5p-fimc: Convert to use generic media bus polarity flags

Switch to generic media bus signal polarity flags and allow
configuring the FIELD signal polarity.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
上级 3c6938f8
...@@ -533,20 +533,24 @@ int fimc_hw_set_camera_polarity(struct fimc_dev *fimc, ...@@ -533,20 +533,24 @@ int fimc_hw_set_camera_polarity(struct fimc_dev *fimc,
u32 cfg = readl(fimc->regs + S5P_CIGCTRL); u32 cfg = readl(fimc->regs + S5P_CIGCTRL);
cfg &= ~(S5P_CIGCTRL_INVPOLPCLK | S5P_CIGCTRL_INVPOLVSYNC | cfg &= ~(S5P_CIGCTRL_INVPOLPCLK | S5P_CIGCTRL_INVPOLVSYNC |
S5P_CIGCTRL_INVPOLHREF | S5P_CIGCTRL_INVPOLHSYNC); S5P_CIGCTRL_INVPOLHREF | S5P_CIGCTRL_INVPOLHSYNC |
S5P_CIGCTRL_INVPOLFIELD);
if (cam->flags & FIMC_CLK_INV_PCLK) if (cam->flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
cfg |= S5P_CIGCTRL_INVPOLPCLK; cfg |= S5P_CIGCTRL_INVPOLPCLK;
if (cam->flags & FIMC_CLK_INV_VSYNC) if (cam->flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
cfg |= S5P_CIGCTRL_INVPOLVSYNC; cfg |= S5P_CIGCTRL_INVPOLVSYNC;
if (cam->flags & FIMC_CLK_INV_HREF) if (cam->flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
cfg |= S5P_CIGCTRL_INVPOLHREF; cfg |= S5P_CIGCTRL_INVPOLHREF;
if (cam->flags & FIMC_CLK_INV_HSYNC) if (cam->flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
cfg |= S5P_CIGCTRL_INVPOLHSYNC; cfg |= S5P_CIGCTRL_INVPOLHSYNC;
if (cam->flags & V4L2_MBUS_FIELD_EVEN_LOW)
cfg |= S5P_CIGCTRL_INVPOLFIELD;
writel(cfg, fimc->regs + S5P_CIGCTRL); writel(cfg, fimc->regs + S5P_CIGCTRL);
return 0; return 0;
......
...@@ -61,6 +61,7 @@ ...@@ -61,6 +61,7 @@
#define S5P_CIGCTRL_CSC_ITU601_709 (1 << 5) #define S5P_CIGCTRL_CSC_ITU601_709 (1 << 5)
#define S5P_CIGCTRL_INVPOLHSYNC (1 << 4) #define S5P_CIGCTRL_INVPOLHSYNC (1 << 4)
#define S5P_CIGCTRL_SELCAM_MIPI (1 << 3) #define S5P_CIGCTRL_SELCAM_MIPI (1 << 3)
#define S5P_CIGCTRL_INVPOLFIELD (1 << 1)
#define S5P_CIGCTRL_INTERLACE (1 << 0) #define S5P_CIGCTRL_INTERLACE (1 << 0)
/* Window offset 2 */ /* Window offset 2 */
......
...@@ -19,11 +19,6 @@ enum cam_bus_type { ...@@ -19,11 +19,6 @@ enum cam_bus_type {
FIMC_LCD_WB, /* FIFO link from LCD mixer */ FIMC_LCD_WB, /* FIFO link from LCD mixer */
}; };
#define FIMC_CLK_INV_PCLK (1 << 0)
#define FIMC_CLK_INV_VSYNC (1 << 1)
#define FIMC_CLK_INV_HREF (1 << 2)
#define FIMC_CLK_INV_HSYNC (1 << 3)
struct i2c_board_info; struct i2c_board_info;
/** /**
...@@ -37,7 +32,7 @@ struct i2c_board_info; ...@@ -37,7 +32,7 @@ struct i2c_board_info;
* @i2c_bus_num: i2c control bus id the sensor is attached to * @i2c_bus_num: i2c control bus id the sensor is attached to
* @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU) * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
* @clk_id: index of the SoC peripheral clock for sensors * @clk_id: index of the SoC peripheral clock for sensors
* @flags: flags defining bus signals polarity inversion (High by default) * @flags: the parallel bus flags defining signals polarity (V4L2_MBUS_*)
*/ */
struct s5p_fimc_isp_info { struct s5p_fimc_isp_info {
struct i2c_board_info *board_info; struct i2c_board_info *board_info;
......
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