提交 0f0881b0 编写于 作者: G Greg Kroah-Hartman

Staging: brcm80211: remove TRUE #define

use the kernel provided 'true' value instead, especially
as we are using a 'bool' for these variables.

Cc: Brett Rudley <brudley@broadcom.com>
Cc: Henry Ptasinski <henryp@broadcom.com>
Cc: Nohee Ko <noheek@broadcom.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
上级 f1c6b7fb
...@@ -76,7 +76,7 @@ bcmsdh_info_t *bcmsdh_attach(osl_t *osh, void *cfghdl, void **regsva, uint irq) ...@@ -76,7 +76,7 @@ bcmsdh_info_t *bcmsdh_attach(osl_t *osh, void *cfghdl, void **regsva, uint irq)
} }
bcmsdh->osh = osh; bcmsdh->osh = osh;
bcmsdh->init_success = TRUE; bcmsdh->init_success = true;
*regsva = (u32 *) SI_ENUM_BASE; *regsva = (u32 *) SI_ENUM_BASE;
...@@ -129,7 +129,7 @@ int bcmsdh_intr_enable(void *sdh) ...@@ -129,7 +129,7 @@ int bcmsdh_intr_enable(void *sdh)
SDIOH_API_RC status; SDIOH_API_RC status;
ASSERT(bcmsdh); ASSERT(bcmsdh);
status = sdioh_interrupt_set(bcmsdh->sdioh, TRUE); status = sdioh_interrupt_set(bcmsdh->sdioh, true);
return SDIOH_API_SUCCESS(status) ? 0 : BCME_ERROR; return SDIOH_API_SUCCESS(status) ? 0 : BCME_ERROR;
} }
...@@ -395,7 +395,7 @@ u32 bcmsdh_reg_read(void *sdh, u32 addr, uint size) ...@@ -395,7 +395,7 @@ u32 bcmsdh_reg_read(void *sdh, u32 addr, uint size)
case sizeof(u32): case sizeof(u32):
return word; return word;
default: default:
bcmsdh->regfail = TRUE; bcmsdh->regfail = true;
} }
} }
......
...@@ -88,36 +88,36 @@ bool bcmsdh_chipmatch(u16 vendor, u16 device) ...@@ -88,36 +88,36 @@ bool bcmsdh_chipmatch(u16 vendor, u16 device)
#ifdef BCMSDIOH_STD #ifdef BCMSDIOH_STD
/* Check for Arasan host controller */ /* Check for Arasan host controller */
if (vendor == VENDOR_SI_IMAGE) if (vendor == VENDOR_SI_IMAGE)
return TRUE; return true;
/* Check for BRCM 27XX Standard host controller */ /* Check for BRCM 27XX Standard host controller */
if (device == BCM27XX_SDIOH_ID && vendor == VENDOR_BROADCOM) if (device == BCM27XX_SDIOH_ID && vendor == VENDOR_BROADCOM)
return TRUE; return true;
/* Check for BRCM Standard host controller */ /* Check for BRCM Standard host controller */
if (device == SDIOH_FPGA_ID && vendor == VENDOR_BROADCOM) if (device == SDIOH_FPGA_ID && vendor == VENDOR_BROADCOM)
return TRUE; return true;
/* Check for TI PCIxx21 Standard host controller */ /* Check for TI PCIxx21 Standard host controller */
if (device == PCIXX21_SDIOH_ID && vendor == VENDOR_TI) if (device == PCIXX21_SDIOH_ID && vendor == VENDOR_TI)
return TRUE; return true;
if (device == PCIXX21_SDIOH0_ID && vendor == VENDOR_TI) if (device == PCIXX21_SDIOH0_ID && vendor == VENDOR_TI)
return TRUE; return true;
/* Ricoh R5C822 Standard SDIO Host */ /* Ricoh R5C822 Standard SDIO Host */
if (device == R5C822_SDIOH_ID && vendor == VENDOR_RICOH) if (device == R5C822_SDIOH_ID && vendor == VENDOR_RICOH)
return TRUE; return true;
/* JMicron Standard SDIO Host */ /* JMicron Standard SDIO Host */
if (device == JMICRON_SDIOH_ID && vendor == VENDOR_JMICRON) if (device == JMICRON_SDIOH_ID && vendor == VENDOR_JMICRON)
return TRUE; return true;
#endif /* BCMSDIOH_STD */ #endif /* BCMSDIOH_STD */
#ifdef BCMSDIOH_SPI #ifdef BCMSDIOH_SPI
/* This is the PciSpiHost. */ /* This is the PciSpiHost. */
if (device == SPIH_FPGA_ID && vendor == VENDOR_BROADCOM) { if (device == SPIH_FPGA_ID && vendor == VENDOR_BROADCOM) {
printf("Found PCI SPI Host Controller\n"); printf("Found PCI SPI Host Controller\n");
return TRUE; return true;
} }
#endif /* BCMSDIOH_SPI */ #endif /* BCMSDIOH_SPI */
...@@ -621,7 +621,7 @@ int bcmsdh_register_oob_intr(void *dhdp) ...@@ -621,7 +621,7 @@ int bcmsdh_register_oob_intr(void *dhdp)
return -ENODEV; return -ENODEV;
set_irq_wake(sdhcinfo->oob_irq, 1); set_irq_wake(sdhcinfo->oob_irq, 1);
sdhcinfo->oob_irq_registered = TRUE; sdhcinfo->oob_irq_registered = true;
} }
return 0; return 0;
......
...@@ -58,7 +58,7 @@ uint sd_power = 1; /* Default to SD Slot powered ON */ ...@@ -58,7 +58,7 @@ uint sd_power = 1; /* Default to SD Slot powered ON */
uint sd_clock = 1; /* Default to SD Clock turned ON */ uint sd_clock = 1; /* Default to SD Clock turned ON */
uint sd_hiok = FALSE; /* Don't use hi-speed mode by default */ uint sd_hiok = FALSE; /* Don't use hi-speed mode by default */
uint sd_msglevel = 0x01; uint sd_msglevel = 0x01;
uint sd_use_dma = TRUE; uint sd_use_dma = true;
DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait); DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait);
DHD_PM_RESUME_WAIT_INIT(sdioh_request_word_wait); DHD_PM_RESUME_WAIT_INIT(sdioh_request_word_wait);
DHD_PM_RESUME_WAIT_INIT(sdioh_request_packet_wait); DHD_PM_RESUME_WAIT_INIT(sdioh_request_packet_wait);
...@@ -138,8 +138,8 @@ extern sdioh_info_t *sdioh_attach(osl_t *osh, void *bar0, uint irq) ...@@ -138,8 +138,8 @@ extern sdioh_info_t *sdioh_attach(osl_t *osh, void *bar0, uint irq)
} }
sd->num_funcs = 2; sd->num_funcs = 2;
sd->sd_blockmode = TRUE; sd->sd_blockmode = true;
sd->use_client_ints = TRUE; sd->use_client_ints = true;
sd->client_block_size[0] = 64; sd->client_block_size[0] = 64;
gInstance->sd = sd; gInstance->sd = sd;
...@@ -281,7 +281,7 @@ sdioh_interrupt_register(sdioh_info_t *sd, sdioh_cb_fn_t fn, void *argh) ...@@ -281,7 +281,7 @@ sdioh_interrupt_register(sdioh_info_t *sd, sdioh_cb_fn_t fn, void *argh)
#if !defined(OOB_INTR_ONLY) #if !defined(OOB_INTR_ONLY)
sd->intr_handler = fn; sd->intr_handler = fn;
sd->intr_handler_arg = argh; sd->intr_handler_arg = argh;
sd->intr_handler_valid = TRUE; sd->intr_handler_valid = true;
/* register and unmask irq */ /* register and unmask irq */
if (gInstance->func[2]) { if (gInstance->func[2]) {
...@@ -444,7 +444,7 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, ...@@ -444,7 +444,7 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name,
if (plen >= (int)sizeof(int_val)) if (plen >= (int)sizeof(int_val))
bcopy(params, &int_val, sizeof(int_val)); bcopy(params, &int_val, sizeof(int_val));
bool_val = (int_val != 0) ? TRUE : FALSE; bool_val = (int_val != 0) ? true : FALSE;
actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid); actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
switch (actionid) { switch (actionid) {
...@@ -1041,9 +1041,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write, ...@@ -1041,9 +1041,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
sd_data(("%s: Creating new %s Packet, len=%d\n", sd_data(("%s: Creating new %s Packet, len=%d\n",
__func__, write ? "TX" : "RX", buflen_u)); __func__, write ? "TX" : "RX", buflen_u));
#ifdef DHD_USE_STATIC_BUF #ifdef DHD_USE_STATIC_BUF
mypkt = PKTGET_STATIC(sd->osh, buflen_u, write ? TRUE : FALSE); mypkt = PKTGET_STATIC(sd->osh, buflen_u, write ? true : FALSE);
#else #else
mypkt = PKTGET(sd->osh, buflen_u, write ? TRUE : FALSE); mypkt = PKTGET(sd->osh, buflen_u, write ? true : FALSE);
#endif /* DHD_USE_STATIC_BUF */ #endif /* DHD_USE_STATIC_BUF */
if (!mypkt) { if (!mypkt) {
sd_err(("%s: PKTGET failed: len %d\n", sd_err(("%s: PKTGET failed: len %d\n",
...@@ -1063,9 +1063,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write, ...@@ -1063,9 +1063,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
bcopy(PKTDATA(mypkt), buffer, buflen_u); bcopy(PKTDATA(mypkt), buffer, buflen_u);
#ifdef DHD_USE_STATIC_BUF #ifdef DHD_USE_STATIC_BUF
PKTFREE_STATIC(sd->osh, mypkt, write ? TRUE : FALSE); PKTFREE_STATIC(sd->osh, mypkt, write ? true : FALSE);
#else #else
PKTFREE(sd->osh, mypkt, write ? TRUE : FALSE); PKTFREE(sd->osh, mypkt, write ? true : FALSE);
#endif /* DHD_USE_STATIC_BUF */ #endif /* DHD_USE_STATIC_BUF */
} else if (((u32) (PKTDATA(pkt)) & DMA_ALIGN_MASK) != 0) { } else if (((u32) (PKTDATA(pkt)) & DMA_ALIGN_MASK) != 0) {
/* Case 2: We have a packet, but it is unaligned. */ /* Case 2: We have a packet, but it is unaligned. */
...@@ -1077,9 +1077,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write, ...@@ -1077,9 +1077,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
__func__, write ? "TX" : "RX", PKTLEN(pkt))); __func__, write ? "TX" : "RX", PKTLEN(pkt)));
#ifdef DHD_USE_STATIC_BUF #ifdef DHD_USE_STATIC_BUF
mypkt = PKTGET_STATIC(sd->osh, PKTLEN(pkt), mypkt = PKTGET_STATIC(sd->osh, PKTLEN(pkt),
write ? TRUE : FALSE); write ? true : FALSE);
#else #else
mypkt = PKTGET(sd->osh, PKTLEN(pkt), write ? TRUE : FALSE); mypkt = PKTGET(sd->osh, PKTLEN(pkt), write ? true : FALSE);
#endif /* DHD_USE_STATIC_BUF */ #endif /* DHD_USE_STATIC_BUF */
if (!mypkt) { if (!mypkt) {
sd_err(("%s: PKTGET failed: len %d\n", sd_err(("%s: PKTGET failed: len %d\n",
...@@ -1099,9 +1099,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write, ...@@ -1099,9 +1099,9 @@ sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
bcopy(PKTDATA(mypkt), PKTDATA(pkt), PKTLEN(mypkt)); bcopy(PKTDATA(mypkt), PKTDATA(pkt), PKTLEN(mypkt));
#ifdef DHD_USE_STATIC_BUF #ifdef DHD_USE_STATIC_BUF
PKTFREE_STATIC(sd->osh, mypkt, write ? TRUE : FALSE); PKTFREE_STATIC(sd->osh, mypkt, write ? true : FALSE);
#else #else
PKTFREE(sd->osh, mypkt, write ? TRUE : FALSE); PKTFREE(sd->osh, mypkt, write ? true : FALSE);
#endif /* DHD_USE_STATIC_BUF */ #endif /* DHD_USE_STATIC_BUF */
} else { /* case 3: We have a packet and } else { /* case 3: We have a packet and
it is aligned. */ it is aligned. */
......
...@@ -87,7 +87,7 @@ typedef struct dhd_pub { ...@@ -87,7 +87,7 @@ typedef struct dhd_pub {
/* Internal dhd items */ /* Internal dhd items */
bool up; /* Driver up/down (to OS) */ bool up; /* Driver up/down (to OS) */
bool txoff; /* Transmit flow-controlled */ bool txoff; /* Transmit flow-controlled */
bool dongle_reset; /* TRUE = DEVRESET put dongle into reset */ bool dongle_reset; /* true = DEVRESET put dongle into reset */
enum dhd_bus_state busstate; enum dhd_bus_state busstate;
uint hdrlen; /* Total DHD header length (proto + bus) */ uint hdrlen; /* Total DHD header length (proto + bus) */
uint maxctl; /* Max size rxctl request from proto to bus */ uint maxctl; /* Max size rxctl request from proto to bus */
......
...@@ -52,7 +52,7 @@ extern bool dhd_bus_watchdog(dhd_pub_t *dhd); ...@@ -52,7 +52,7 @@ extern bool dhd_bus_watchdog(dhd_pub_t *dhd);
extern int dhd_bus_console_in(dhd_pub_t *dhd, unsigned char *msg, uint msglen); extern int dhd_bus_console_in(dhd_pub_t *dhd, unsigned char *msg, uint msglen);
#endif /* DHD_DEBUG */ #endif /* DHD_DEBUG */
/* Deferred processing for the bus, return TRUE requests reschedule */ /* Deferred processing for the bus, return true requests reschedule */
extern bool dhd_bus_dpc(struct dhd_bus *bus); extern bool dhd_bus_dpc(struct dhd_bus *bus);
extern void dhd_bus_isr(bool *InterruptRecognized, extern void dhd_bus_isr(bool *InterruptRecognized,
bool *QueueMiniportHandleInterrupt, void *arg); bool *QueueMiniportHandleInterrupt, void *arg);
......
...@@ -248,7 +248,7 @@ dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc, void *buf, int len) ...@@ -248,7 +248,7 @@ dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc, void *buf, int len)
if (len > WLC_IOCTL_MAXLEN) if (len > WLC_IOCTL_MAXLEN)
goto done; goto done;
if (prot->pending == TRUE) { if (prot->pending == true) {
DHD_TRACE(("CDC packet is pending!!!! cmd=0x%x (%lu) " DHD_TRACE(("CDC packet is pending!!!! cmd=0x%x (%lu) "
"lastcmd=0x%x (%lu)\n", "lastcmd=0x%x (%lu)\n",
ioc->cmd, (unsigned long)ioc->cmd, prot->lastcmd, ioc->cmd, (unsigned long)ioc->cmd, prot->lastcmd,
...@@ -259,7 +259,7 @@ dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc, void *buf, int len) ...@@ -259,7 +259,7 @@ dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc, void *buf, int len)
goto done; goto done;
} }
prot->pending = TRUE; prot->pending = true;
prot->lastcmd = ioc->cmd; prot->lastcmd = ioc->cmd;
if (ioc->set) if (ioc->set)
ret = dhdcdc_set_ioctl(dhd, ifidx, ioc->cmd, buf, len); ret = dhdcdc_set_ioctl(dhd, ifidx, ioc->cmd, buf, len);
...@@ -349,7 +349,7 @@ bool dhd_proto_fcinfo(dhd_pub_t *dhd, void *pktbuf, u8 * fcbits) ...@@ -349,7 +349,7 @@ bool dhd_proto_fcinfo(dhd_pub_t *dhd, void *pktbuf, u8 * fcbits)
*fcbits = h->priority >> BDC_PRIORITY_FC_SHIFT; *fcbits = h->priority >> BDC_PRIORITY_FC_SHIFT;
if ((h->flags2 & BDC_FLAG2_FC_FLAG) == BDC_FLAG2_FC_FLAG) if ((h->flags2 & BDC_FLAG2_FC_FLAG) == BDC_FLAG2_FC_FLAG)
return TRUE; return true;
#endif #endif
return FALSE; return FALSE;
} }
...@@ -391,7 +391,7 @@ int dhd_prot_hdrpull(dhd_pub_t *dhd, int *ifidx, void *pktbuf) ...@@ -391,7 +391,7 @@ int dhd_prot_hdrpull(dhd_pub_t *dhd, int *ifidx, void *pktbuf)
DHD_INFO(("%s: BDC packet received with good rx-csum, " DHD_INFO(("%s: BDC packet received with good rx-csum, "
"flags 0x%x\n", "flags 0x%x\n",
dhd_ifname(dhd, *ifidx), h->flags)); dhd_ifname(dhd, *ifidx), h->flags));
PKTSETSUMGOOD(pktbuf, TRUE); PKTSETSUMGOOD(pktbuf, true);
} }
PKTSETPRIO(pktbuf, (h->priority & BDC_PRIORITY_MASK)); PKTSETPRIO(pktbuf, (h->priority & BDC_PRIORITY_MASK));
...@@ -489,7 +489,7 @@ int dhd_prot_init(dhd_pub_t *dhd) ...@@ -489,7 +489,7 @@ int dhd_prot_init(dhd_pub_t *dhd)
#endif /* EMBEDDED_PLATFORM */ #endif /* EMBEDDED_PLATFORM */
/* Always assumes wl for now */ /* Always assumes wl for now */
dhd->iswl = TRUE; dhd->iswl = true;
return ret; return ret;
} }
......
...@@ -337,7 +337,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, void *pkt, int prec) ...@@ -337,7 +337,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, void *pkt, int prec)
*/ */
if (!pktq_pfull(q, prec) && !pktq_full(q)) { if (!pktq_pfull(q, prec) && !pktq_full(q)) {
pktq_penq(q, prec, pkt); pktq_penq(q, prec, pkt);
return TRUE; return true;
} }
/* Determine precedence from which to evict packet, if any */ /* Determine precedence from which to evict packet, if any */
...@@ -366,7 +366,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, void *pkt, int prec) ...@@ -366,7 +366,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, void *pkt, int prec)
ASSERT(p); ASSERT(p);
} }
PKTFREE(dhdp->osh, p, TRUE); PKTFREE(dhdp->osh, p, true);
} }
/* Enqueue */ /* Enqueue */
...@@ -376,7 +376,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, void *pkt, int prec) ...@@ -376,7 +376,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, void *pkt, int prec)
ASSERT(p); ASSERT(p);
} }
return TRUE; return true;
} }
static int static int
...@@ -608,11 +608,11 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) ...@@ -608,11 +608,11 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data)
DHD_EVENT(("EVENT: %s, event ID = %d\n", event_name, event_type)); DHD_EVENT(("EVENT: %s, event ID = %d\n", event_name, event_type));
if (flags & WLC_EVENT_MSG_LINK) if (flags & WLC_EVENT_MSG_LINK)
link = TRUE; link = true;
if (flags & WLC_EVENT_MSG_GROUP) if (flags & WLC_EVENT_MSG_GROUP)
group = TRUE; group = true;
if (flags & WLC_EVENT_MSG_FLUSHTXQ) if (flags & WLC_EVENT_MSG_FLUSHTXQ)
flush_txq = TRUE; flush_txq = true;
switch (event_type) { switch (event_type) {
case WLC_E_START: case WLC_E_START:
......
...@@ -273,7 +273,7 @@ module_param_string(nvram_path, nvram_path, MOD_PARAM_PATHLEN, 0); ...@@ -273,7 +273,7 @@ module_param_string(nvram_path, nvram_path, MOD_PARAM_PATHLEN, 0);
module_param(dhd_msg_level, int, 0); module_param(dhd_msg_level, int, 0);
/* Spawn a thread for system ioctls (set mac, set mcast) */ /* Spawn a thread for system ioctls (set mac, set mcast) */
uint dhd_sysioc = TRUE; uint dhd_sysioc = true;
module_param(dhd_sysioc, uint, 0); module_param(dhd_sysioc, uint, 0);
/* Watchdog interval */ /* Watchdog interval */
...@@ -292,11 +292,11 @@ uint dhd_arp_mode = 0xb; ...@@ -292,11 +292,11 @@ uint dhd_arp_mode = 0xb;
module_param(dhd_arp_mode, uint, 0); module_param(dhd_arp_mode, uint, 0);
/* ARP offload enable */ /* ARP offload enable */
uint dhd_arp_enable = TRUE; uint dhd_arp_enable = true;
module_param(dhd_arp_enable, uint, 0); module_param(dhd_arp_enable, uint, 0);
/* Global Pkt filter enable control */ /* Global Pkt filter enable control */
uint dhd_pkt_filter_enable = TRUE; uint dhd_pkt_filter_enable = true;
module_param(dhd_pkt_filter_enable, uint, 0); module_param(dhd_pkt_filter_enable, uint, 0);
/* Pkt filter init setup */ /* Pkt filter init setup */
...@@ -304,7 +304,7 @@ uint dhd_pkt_filter_init; ...@@ -304,7 +304,7 @@ uint dhd_pkt_filter_init;
module_param(dhd_pkt_filter_init, uint, 0); module_param(dhd_pkt_filter_init, uint, 0);
/* Pkt filter mode control */ /* Pkt filter mode control */
uint dhd_master_mode = TRUE; uint dhd_master_mode = true;
module_param(dhd_master_mode, uint, 1); module_param(dhd_master_mode, uint, 1);
/* Watchdog thread priority, -1 to use kernel timer */ /* Watchdog thread priority, -1 to use kernel timer */
...@@ -347,11 +347,11 @@ uint dhd_poll = FALSE; ...@@ -347,11 +347,11 @@ uint dhd_poll = FALSE;
module_param(dhd_poll, uint, 0); module_param(dhd_poll, uint, 0);
/* Use cfg80211 */ /* Use cfg80211 */
uint dhd_cfg80211 = TRUE; uint dhd_cfg80211 = true;
module_param(dhd_cfg80211, uint, 0); module_param(dhd_cfg80211, uint, 0);
/* Use interrupts */ /* Use interrupts */
uint dhd_intr = TRUE; uint dhd_intr = true;
module_param(dhd_intr, uint, 0); module_param(dhd_intr, uint, 0);
/* SDIO Drive Strength (in milliamps) */ /* SDIO Drive Strength (in milliamps) */
...@@ -422,7 +422,7 @@ static int dhd_sleep_pm_callback(struct notifier_block *nfb, ...@@ -422,7 +422,7 @@ static int dhd_sleep_pm_callback(struct notifier_block *nfb,
switch (action) { switch (action) {
case PM_HIBERNATION_PREPARE: case PM_HIBERNATION_PREPARE:
case PM_SUSPEND_PREPARE: case PM_SUSPEND_PREPARE:
dhd_mmc_suspend = TRUE; dhd_mmc_suspend = true;
return NOTIFY_OK; return NOTIFY_OK;
case PM_POST_HIBERNATION: case PM_POST_HIBERNATION:
case PM_POST_SUSPEND: case PM_POST_SUSPEND:
...@@ -707,7 +707,7 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx) ...@@ -707,7 +707,7 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx)
cnt = netdev_mc_count(dev); cnt = netdev_mc_count(dev);
/* Determine initial value of allmulti flag */ /* Determine initial value of allmulti flag */
allmulti = (dev->flags & IFF_ALLMULTI) ? TRUE : FALSE; allmulti = (dev->flags & IFF_ALLMULTI) ? true : FALSE;
/* Send down the multicast list first. */ /* Send down the multicast list first. */
...@@ -738,13 +738,13 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx) ...@@ -738,13 +738,13 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx)
ioc.cmd = WLC_SET_VAR; ioc.cmd = WLC_SET_VAR;
ioc.buf = buf; ioc.buf = buf;
ioc.len = buflen; ioc.len = buflen;
ioc.set = TRUE; ioc.set = true;
ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
if (ret < 0) { if (ret < 0) {
DHD_ERROR(("%s: set mcast_list failed, cnt %d\n", DHD_ERROR(("%s: set mcast_list failed, cnt %d\n",
dhd_ifname(&dhd->pub, ifidx), cnt)); dhd_ifname(&dhd->pub, ifidx), cnt));
allmulti = cnt ? TRUE : allmulti; allmulti = cnt ? true : allmulti;
} }
MFREE(dhd->pub.osh, buf, buflen); MFREE(dhd->pub.osh, buf, buflen);
...@@ -776,7 +776,7 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx) ...@@ -776,7 +776,7 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx)
ioc.cmd = WLC_SET_VAR; ioc.cmd = WLC_SET_VAR;
ioc.buf = buf; ioc.buf = buf;
ioc.len = buflen; ioc.len = buflen;
ioc.set = TRUE; ioc.set = true;
ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
if (ret < 0) { if (ret < 0) {
...@@ -789,14 +789,14 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx) ...@@ -789,14 +789,14 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx)
/* Finally, pick up the PROMISC flag as well, like the NIC /* Finally, pick up the PROMISC flag as well, like the NIC
driver does */ driver does */
allmulti = (dev->flags & IFF_PROMISC) ? TRUE : FALSE; allmulti = (dev->flags & IFF_PROMISC) ? true : FALSE;
allmulti = htol32(allmulti); allmulti = htol32(allmulti);
memset(&ioc, 0, sizeof(ioc)); memset(&ioc, 0, sizeof(ioc));
ioc.cmd = WLC_SET_PROMISC; ioc.cmd = WLC_SET_PROMISC;
ioc.buf = &allmulti; ioc.buf = &allmulti;
ioc.len = sizeof(allmulti); ioc.len = sizeof(allmulti);
ioc.set = TRUE; ioc.set = true;
ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
if (ret < 0) { if (ret < 0) {
...@@ -823,7 +823,7 @@ _dhd_set_mac_address(dhd_info_t *dhd, int ifidx, struct ether_addr *addr) ...@@ -823,7 +823,7 @@ _dhd_set_mac_address(dhd_info_t *dhd, int ifidx, struct ether_addr *addr)
ioc.cmd = WLC_SET_VAR; ioc.cmd = WLC_SET_VAR;
ioc.buf = buf; ioc.buf = buf;
ioc.len = 32; ioc.len = 32;
ioc.set = TRUE; ioc.set = true;
ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
if (ret < 0) { if (ret < 0) {
...@@ -999,7 +999,7 @@ static int dhd_set_mac_address(struct net_device *dev, void *addr) ...@@ -999,7 +999,7 @@ static int dhd_set_mac_address(struct net_device *dev, void *addr)
ASSERT(dhd->sysioc_tsk); ASSERT(dhd->sysioc_tsk);
memcpy(&dhd->macvalue, sa->sa_data, ETHER_ADDR_LEN); memcpy(&dhd->macvalue, sa->sa_data, ETHER_ADDR_LEN);
dhd->set_macaddress = TRUE; dhd->set_macaddress = true;
up(&dhd->sysioc_sem); up(&dhd->sysioc_sem);
return ret; return ret;
...@@ -1015,7 +1015,7 @@ static void dhd_set_multicast_list(struct net_device *dev) ...@@ -1015,7 +1015,7 @@ static void dhd_set_multicast_list(struct net_device *dev)
return; return;
ASSERT(dhd->sysioc_tsk); ASSERT(dhd->sysioc_tsk);
dhd->set_multicast = TRUE; dhd->set_multicast = true;
up(&dhd->sysioc_sem); up(&dhd->sysioc_sem);
} }
...@@ -1376,7 +1376,7 @@ static int dhd_dpc_thread(void *data) ...@@ -1376,7 +1376,7 @@ static int dhd_dpc_thread(void *data)
} }
WAKE_UNLOCK(&dhd->pub, WAKE_LOCK_DPC); WAKE_UNLOCK(&dhd->pub, WAKE_LOCK_DPC);
} else { } else {
dhd_bus_stop(dhd->pub.bus, TRUE); dhd_bus_stop(dhd->pub.bus, true);
} }
} else } else
break; break;
...@@ -1397,7 +1397,7 @@ static void dhd_dpc(unsigned long data) ...@@ -1397,7 +1397,7 @@ static void dhd_dpc(unsigned long data)
if (dhd_bus_dpc(dhd->pub.bus)) if (dhd_bus_dpc(dhd->pub.bus))
tasklet_schedule(&dhd->tasklet); tasklet_schedule(&dhd->tasklet);
} else { } else {
dhd_bus_stop(dhd->pub.bus, TRUE); dhd_bus_stop(dhd->pub.bus, true);
} }
} }
...@@ -1461,7 +1461,7 @@ static int dhd_toe_set(dhd_info_t *dhd, int ifidx, u32 toe_ol) ...@@ -1461,7 +1461,7 @@ static int dhd_toe_set(dhd_info_t *dhd, int ifidx, u32 toe_ol)
ioc.cmd = WLC_SET_VAR; ioc.cmd = WLC_SET_VAR;
ioc.buf = buf; ioc.buf = buf;
ioc.len = (uint) sizeof(buf); ioc.len = (uint) sizeof(buf);
ioc.set = TRUE; ioc.set = true;
/* Set toe_ol as requested */ /* Set toe_ol as requested */
...@@ -1818,7 +1818,7 @@ static int dhd_open(struct net_device *net) ...@@ -1818,7 +1818,7 @@ static int dhd_open(struct net_device *net)
osl_t *dhd_osl_attach(void *pdev, uint bustype) osl_t *dhd_osl_attach(void *pdev, uint bustype)
{ {
return osl_attach(pdev, bustype, TRUE); return osl_attach(pdev, bustype, true);
} }
void dhd_osl_detach(osl_t *osh) void dhd_osl_detach(osl_t *osh)
...@@ -1985,7 +1985,7 @@ dhd_pub_t *dhd_attach(osl_t *osh, struct dhd_bus *bus, uint bus_hdrlen) ...@@ -1985,7 +1985,7 @@ dhd_pub_t *dhd_attach(osl_t *osh, struct dhd_bus *bus, uint bus_hdrlen)
/* Initialize thread based operation and lock */ /* Initialize thread based operation and lock */
init_MUTEX(&dhd->sdsem); init_MUTEX(&dhd->sdsem);
if ((dhd_watchdog_prio >= 0) && (dhd_dpc_prio >= 0)) if ((dhd_watchdog_prio >= 0) && (dhd_dpc_prio >= 0))
dhd->threads_only = TRUE; dhd->threads_only = true;
else else
dhd->threads_only = FALSE; dhd->threads_only = FALSE;
...@@ -2102,7 +2102,7 @@ int dhd_bus_start(dhd_pub_t *dhdp) ...@@ -2102,7 +2102,7 @@ int dhd_bus_start(dhd_pub_t *dhdp)
dhd_os_wd_timer(&dhd->pub, dhd_watchdog_ms); dhd_os_wd_timer(&dhd->pub, dhd_watchdog_ms);
/* Bring up the bus */ /* Bring up the bus */
ret = dhd_bus_init(&dhd->pub, TRUE); ret = dhd_bus_init(&dhd->pub, true);
if (ret != 0) { if (ret != 0) {
DHD_ERROR(("%s, dhd_bus_init failed %d\n", __func__, ret)); DHD_ERROR(("%s, dhd_bus_init failed %d\n", __func__, ret));
return ret; return ret;
...@@ -2117,7 +2117,7 @@ int dhd_bus_start(dhd_pub_t *dhdp) ...@@ -2117,7 +2117,7 @@ int dhd_bus_start(dhd_pub_t *dhdp)
} }
/* Enable oob at firmware */ /* Enable oob at firmware */
dhd_enable_oob_intr(dhd->pub.bus, TRUE); dhd_enable_oob_intr(dhd->pub.bus, true);
#endif /* defined(OOB_INTR_ONLY) */ #endif /* defined(OOB_INTR_ONLY) */
/* If bus is not ready, can't come up */ /* If bus is not ready, can't come up */
...@@ -2295,7 +2295,7 @@ void dhd_bus_detach(dhd_pub_t *dhdp) ...@@ -2295,7 +2295,7 @@ void dhd_bus_detach(dhd_pub_t *dhdp)
dhd_prot_stop(&dhd->pub); dhd_prot_stop(&dhd->pub);
/* Stop the bus module */ /* Stop the bus module */
dhd_bus_stop(dhd->pub.bus, TRUE); dhd_bus_stop(dhd->pub.bus, true);
#if defined(OOB_INTR_ONLY) #if defined(OOB_INTR_ONLY)
bcmsdh_unregister_oob_intr(); bcmsdh_unregister_oob_intr();
#endif /* defined(OOB_INTR_ONLY) */ #endif /* defined(OOB_INTR_ONLY) */
...@@ -2504,7 +2504,7 @@ int dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition, bool *pending) ...@@ -2504,7 +2504,7 @@ int dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition, bool *pending)
timeout = schedule_timeout(timeout); timeout = schedule_timeout(timeout);
if (signal_pending(current)) if (signal_pending(current))
*pending = TRUE; *pending = true;
set_current_state(TASK_RUNNING); set_current_state(TASK_RUNNING);
remove_wait_queue(&dhd->ioctl_resp_wait, &wait); remove_wait_queue(&dhd->ioctl_resp_wait, &wait);
...@@ -2533,7 +2533,7 @@ void dhd_os_wd_timer(void *bus, uint wdtick) ...@@ -2533,7 +2533,7 @@ void dhd_os_wd_timer(void *bus, uint wdtick)
return; return;
/* Totally stop the timer */ /* Totally stop the timer */
if (!wdtick && dhd->wd_timer_valid == TRUE) { if (!wdtick && dhd->wd_timer_valid == true) {
del_timer_sync(&dhd->timer); del_timer_sync(&dhd->timer);
dhd->wd_timer_valid = FALSE; dhd->wd_timer_valid = FALSE;
save_dhd_watchdog_ms = wdtick; save_dhd_watchdog_ms = wdtick;
...@@ -2545,7 +2545,7 @@ void dhd_os_wd_timer(void *bus, uint wdtick) ...@@ -2545,7 +2545,7 @@ void dhd_os_wd_timer(void *bus, uint wdtick)
if (save_dhd_watchdog_ms != dhd_watchdog_ms) { if (save_dhd_watchdog_ms != dhd_watchdog_ms) {
if (dhd->wd_timer_valid == TRUE) if (dhd->wd_timer_valid == true)
/* Stop timer and restart at new value */ /* Stop timer and restart at new value */
del_timer_sync(&dhd->timer); del_timer_sync(&dhd->timer);
...@@ -2562,7 +2562,7 @@ void dhd_os_wd_timer(void *bus, uint wdtick) ...@@ -2562,7 +2562,7 @@ void dhd_os_wd_timer(void *bus, uint wdtick)
jiffies + dhd_watchdog_ms * HZ / 1000); jiffies + dhd_watchdog_ms * HZ / 1000);
} }
dhd->wd_timer_valid = TRUE; dhd->wd_timer_valid = true;
save_dhd_watchdog_ms = wdtick; save_dhd_watchdog_ms = wdtick;
} }
} }
......
...@@ -750,7 +750,7 @@ static s32 wl_do_iscan(struct wl_priv *wl) ...@@ -750,7 +750,7 @@ static s32 wl_do_iscan(struct wl_priv *wl)
} }
} }
wl_set_mpc(ndev, 0); wl_set_mpc(ndev, 0);
wl->iscan_kickstart = TRUE; wl->iscan_kickstart = true;
wl_run_iscan(iscan, &ssid, WL_SCAN_ACTION_START); wl_run_iscan(iscan, &ssid, WL_SCAN_ACTION_START);
mod_timer(&iscan->timer, jiffies + iscan->timer_ms * HZ / 1000); mod_timer(&iscan->timer, jiffies + iscan->timer_ms * HZ / 1000);
iscan->timer_on = 1; iscan->timer_on = 1;
...@@ -793,7 +793,7 @@ __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, ...@@ -793,7 +793,7 @@ __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
* we do not iscan for * we do not iscan for
* specific scan request * specific scan request
*/ */
iscan_req = TRUE; iscan_req = true;
} }
} else { /* scan in ibss */ } else { /* scan in ibss */
/* we don't do iscan in ibss */ /* we don't do iscan in ibss */
...@@ -818,7 +818,7 @@ __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, ...@@ -818,7 +818,7 @@ __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
sr->ssid.SSID_len = htod32(sr->ssid.SSID_len); sr->ssid.SSID_len = htod32(sr->ssid.SSID_len);
WL_DBG(("Specific scan ssid=\"%s\" len=%d\n", WL_DBG(("Specific scan ssid=\"%s\" len=%d\n",
sr->ssid.SSID, sr->ssid.SSID_len)); sr->ssid.SSID, sr->ssid.SSID_len));
spec_scan = TRUE; spec_scan = true;
} else { } else {
WL_DBG(("Broadcast scan\n")); WL_DBG(("Broadcast scan\n"));
} }
...@@ -977,7 +977,7 @@ static s32 wl_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed) ...@@ -977,7 +977,7 @@ static s32 wl_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed)
if (changed & WIPHY_PARAM_RETRY_LONG if (changed & WIPHY_PARAM_RETRY_LONG
&& (wl->conf->retry_long != wiphy->retry_long)) { && (wl->conf->retry_long != wiphy->retry_long)) {
wl->conf->retry_long = wiphy->retry_long; wl->conf->retry_long = wiphy->retry_long;
err = wl_set_retry(ndev, wl->conf->retry_long, TRUE); err = wl_set_retry(ndev, wl->conf->retry_long, true);
if (!err) if (!err)
return err; return err;
} }
...@@ -1035,7 +1035,7 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, ...@@ -1035,7 +1035,7 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev,
wl->ibss_starter = FALSE; wl->ibss_starter = FALSE;
WL_DBG(("Found IBSS\n")); WL_DBG(("Found IBSS\n"));
} else { } else {
wl->ibss_starter = TRUE; wl->ibss_starter = true;
} }
chan = params->channel; chan = params->channel;
if (chan) if (chan)
...@@ -1574,7 +1574,7 @@ wl_add_keyext(struct wiphy *wiphy, struct net_device *dev, ...@@ -1574,7 +1574,7 @@ wl_add_keyext(struct wiphy *wiphy, struct net_device *dev,
key.rxiv.hi = (ivptr[5] << 24) | (ivptr[4] << 16) | key.rxiv.hi = (ivptr[5] << 24) | (ivptr[4] << 16) |
(ivptr[3] << 8) | ivptr[2]; (ivptr[3] << 8) | ivptr[2];
key.rxiv.lo = (ivptr[1] << 8) | ivptr[0]; key.rxiv.lo = (ivptr[1] << 8) | ivptr[0];
key.iv_initialized = TRUE; key.iv_initialized = true;
} }
switch (params->cipher) { switch (params->cipher) {
...@@ -1991,7 +1991,7 @@ static s32 wl_cfg80211_suspend(struct wiphy *wiphy) ...@@ -1991,7 +1991,7 @@ static s32 wl_cfg80211_suspend(struct wiphy *wiphy)
set_bit(WL_STATUS_SCAN_ABORTING, &wl->status); set_bit(WL_STATUS_SCAN_ABORTING, &wl->status);
wl_term_iscan(wl); wl_term_iscan(wl);
if (wl->scan_request) { if (wl->scan_request) {
cfg80211_scan_done(wl->scan_request, TRUE); /* TRUE means cfg80211_scan_done(wl->scan_request, true); /* true means
abort */ abort */
wl_set_mpc(ndev, 1); wl_set_mpc(ndev, 1);
wl->scan_request = NULL; wl->scan_request = NULL;
...@@ -2339,7 +2339,7 @@ static bool wl_is_linkup(struct wl_priv *wl, const wl_event_msg_t *e) ...@@ -2339,7 +2339,7 @@ static bool wl_is_linkup(struct wl_priv *wl, const wl_event_msg_t *e)
if (wl_is_ibssstarter(wl)) { if (wl_is_ibssstarter(wl)) {
} }
} else { } else {
return TRUE; return true;
} }
} }
} }
...@@ -2353,10 +2353,10 @@ static bool wl_is_linkdown(struct wl_priv *wl, const wl_event_msg_t *e) ...@@ -2353,10 +2353,10 @@ static bool wl_is_linkdown(struct wl_priv *wl, const wl_event_msg_t *e)
u16 flags = ntoh16(e->flags); u16 flags = ntoh16(e->flags);
if (event == WLC_E_DEAUTH_IND || event == WLC_E_DISASSOC_IND) { if (event == WLC_E_DEAUTH_IND || event == WLC_E_DISASSOC_IND) {
return TRUE; return true;
} else if (event == WLC_E_LINK) { } else if (event == WLC_E_LINK) {
if (!(flags & WLC_EVENT_MSG_LINK)) if (!(flags & WLC_EVENT_MSG_LINK))
return TRUE; return true;
} }
return FALSE; return FALSE;
...@@ -2369,7 +2369,7 @@ static bool wl_is_nonetwork(struct wl_priv *wl, const wl_event_msg_t *e) ...@@ -2369,7 +2369,7 @@ static bool wl_is_nonetwork(struct wl_priv *wl, const wl_event_msg_t *e)
if (event == WLC_E_SET_SSID || event == WLC_E_LINK) { if (event == WLC_E_SET_SSID || event == WLC_E_LINK) {
if (status == WLC_E_STATUS_NO_NETWORKS) if (status == WLC_E_STATUS_NO_NETWORKS)
return TRUE; return true;
} }
return FALSE; return FALSE;
...@@ -2389,12 +2389,12 @@ wl_notify_connect_status(struct wl_priv *wl, struct net_device *ndev, ...@@ -2389,12 +2389,12 @@ wl_notify_connect_status(struct wl_priv *wl, struct net_device *ndev,
GFP_KERNEL); GFP_KERNEL);
WL_DBG(("joined in IBSS network\n")); WL_DBG(("joined in IBSS network\n"));
} else { } else {
wl_bss_connect_done(wl, ndev, e, data, TRUE); wl_bss_connect_done(wl, ndev, e, data, true);
WL_DBG(("joined in BSS network \"%s\"\n", WL_DBG(("joined in BSS network \"%s\"\n",
((struct wlc_ssid *) ((struct wlc_ssid *)
wl_read_prof(wl, WL_PROF_SSID))->SSID)); wl_read_prof(wl, WL_PROF_SSID))->SSID));
} }
act = TRUE; act = true;
wl_update_prof(wl, e, &act, WL_PROF_ACT); wl_update_prof(wl, e, &act, WL_PROF_ACT);
} else if (wl_is_linkdown(wl, e)) { } else if (wl_is_linkdown(wl, e)) {
cfg80211_disconnected(ndev, 0, NULL, 0, GFP_KERNEL); cfg80211_disconnected(ndev, 0, NULL, 0, GFP_KERNEL);
...@@ -2416,7 +2416,7 @@ wl_notify_roaming_status(struct wl_priv *wl, struct net_device *ndev, ...@@ -2416,7 +2416,7 @@ wl_notify_roaming_status(struct wl_priv *wl, struct net_device *ndev,
s32 err = 0; s32 err = 0;
wl_bss_roaming_done(wl, ndev, e, data); wl_bss_roaming_done(wl, ndev, e, data);
act = TRUE; act = true;
wl_update_prof(wl, e, &act, WL_PROF_ACT); wl_update_prof(wl, e, &act, WL_PROF_ACT);
return err; return err;
...@@ -2978,7 +2978,7 @@ static s32 wl_iscan_aborted(struct wl_priv *wl) ...@@ -2978,7 +2978,7 @@ static s32 wl_iscan_aborted(struct wl_priv *wl)
iscan->state = WL_ISCAN_STATE_IDLE; iscan->state = WL_ISCAN_STATE_IDLE;
rtnl_lock(); rtnl_lock();
wl_notify_iscan_complete(iscan, TRUE); wl_notify_iscan_complete(iscan, true);
rtnl_unlock(); rtnl_unlock();
return err; return err;
...@@ -3099,20 +3099,20 @@ static s32 wl_init_priv(struct wl_priv *wl) ...@@ -3099,20 +3099,20 @@ static s32 wl_init_priv(struct wl_priv *wl)
wl->scan_request = NULL; wl->scan_request = NULL;
wl->pwr_save = !!(wiphy->flags & WIPHY_FLAG_PS_ON_BY_DEFAULT); wl->pwr_save = !!(wiphy->flags & WIPHY_FLAG_PS_ON_BY_DEFAULT);
#ifndef WL_ISCAN_DISABLED #ifndef WL_ISCAN_DISABLED
wl->iscan_on = TRUE; /* iscan on & off switch. wl->iscan_on = true; /* iscan on & off switch.
we enable iscan per default */ we enable iscan per default */
#else #else
wl->iscan_on = FALSE; wl->iscan_on = FALSE;
#endif /* WL_ISCAN_DISABLED */ #endif /* WL_ISCAN_DISABLED */
#ifndef WL_ROAM_DISABLED #ifndef WL_ROAM_DISABLED
wl->roam_on = TRUE; /* roam on & off switch. wl->roam_on = true; /* roam on & off switch.
we enable roam per default */ we enable roam per default */
#else #else
wl->roam_on = FALSE; wl->roam_on = FALSE;
#endif /* WL_ROAM_DISABLED */ #endif /* WL_ROAM_DISABLED */
wl->iscan_kickstart = FALSE; wl->iscan_kickstart = FALSE;
wl->active_scan = TRUE; /* we do active scan for wl->active_scan = true; /* we do active scan for
specific scan per default */ specific scan per default */
wl->dongle_up = FALSE; /* dongle is not up yet */ wl->dongle_up = FALSE; /* dongle is not up yet */
wl_init_eq(wl); wl_init_eq(wl);
...@@ -3742,7 +3742,7 @@ s32 wl_config_dongle(struct wl_priv *wl, bool need_lock) ...@@ -3742,7 +3742,7 @@ s32 wl_config_dongle(struct wl_priv *wl, bool need_lock)
if (need_lock) if (need_lock)
rtnl_unlock(); rtnl_unlock();
wl->dongle_up = TRUE; wl->dongle_up = true;
return err; return err;
...@@ -3797,7 +3797,7 @@ static s32 __wl_cfg80211_down(struct wl_priv *wl) ...@@ -3797,7 +3797,7 @@ static s32 __wl_cfg80211_down(struct wl_priv *wl)
set_bit(WL_STATUS_SCAN_ABORTING, &wl->status); set_bit(WL_STATUS_SCAN_ABORTING, &wl->status);
wl_term_iscan(wl); wl_term_iscan(wl);
if (wl->scan_request) { if (wl->scan_request) {
cfg80211_scan_done(wl->scan_request, TRUE); /* TRUE cfg80211_scan_done(wl->scan_request, true); /* true
means abort */ means abort */
wl_set_mpc(ndev, 1); wl_set_mpc(ndev, 1);
wl->scan_request = NULL; wl->scan_request = NULL;
...@@ -3982,7 +3982,7 @@ static u32 wl_get_ielen(struct wl_priv *wl) ...@@ -3982,7 +3982,7 @@ static u32 wl_get_ielen(struct wl_priv *wl)
static void wl_link_up(struct wl_priv *wl) static void wl_link_up(struct wl_priv *wl)
{ {
wl->link_up = TRUE; wl->link_up = true;
} }
static void wl_link_down(struct wl_priv *wl) static void wl_link_down(struct wl_priv *wl)
......
...@@ -57,7 +57,7 @@ typedef const struct si_pub si_t; ...@@ -57,7 +57,7 @@ typedef const struct si_pub si_t;
#define WL_IW_USE_ISCAN 1 #define WL_IW_USE_ISCAN 1
#define ENABLE_ACTIVE_PASSIVE_SCAN_SUPPRESS 1 #define ENABLE_ACTIVE_PASSIVE_SCAN_SUPPRESS 1
bool g_set_essid_before_scan = TRUE; bool g_set_essid_before_scan = true;
#define WL_IW_IOCTL_CALL(func_call) \ #define WL_IW_IOCTL_CALL(func_call) \
do { \ do { \
...@@ -1189,7 +1189,7 @@ static int _iscan_sysioc_thread(void *data) ...@@ -1189,7 +1189,7 @@ static int _iscan_sysioc_thread(void *data)
rtnl_lock(); rtnl_lock();
status = wl_iw_iscan_get(iscan); status = wl_iw_iscan_get(iscan);
rtnl_unlock(); rtnl_unlock();
if (g_scan_specified_ssid && (iscan_pass_abort == TRUE)) { if (g_scan_specified_ssid && (iscan_pass_abort == true)) {
WL_TRACE(("%s Get results from specific scan " WL_TRACE(("%s Get results from specific scan "
"status = %d\n", __func__, status)); "status = %d\n", __func__, status));
wl_iw_send_scan_complete(iscan); wl_iw_send_scan_complete(iscan);
...@@ -1224,7 +1224,7 @@ static int _iscan_sysioc_thread(void *data) ...@@ -1224,7 +1224,7 @@ static int _iscan_sysioc_thread(void *data)
if (g_scan_specified_ssid == 0) if (g_scan_specified_ssid == 0)
wl_iw_send_scan_complete(iscan); wl_iw_send_scan_complete(iscan);
else { else {
iscan_pass_abort = TRUE; iscan_pass_abort = true;
wl_iw_force_specific_scan(iscan); wl_iw_force_specific_scan(iscan);
} }
break; break;
...@@ -1407,7 +1407,7 @@ static bool ie_is_wpa_ie(u8 **wpaie, u8 **tlvs, int *tlvs_len) ...@@ -1407,7 +1407,7 @@ static bool ie_is_wpa_ie(u8 **wpaie, u8 **tlvs, int *tlvs_len)
if ((ie[1] >= 6) && if ((ie[1] >= 6) &&
!bcmp((const void *)&ie[2], (const void *)(WPA_OUI "\x01"), 4)) { !bcmp((const void *)&ie[2], (const void *)(WPA_OUI "\x01"), 4)) {
return TRUE; return true;
} }
ie += ie[1] + 2; ie += ie[1] + 2;
...@@ -1423,7 +1423,7 @@ static bool ie_is_wps_ie(u8 **wpsie, u8 **tlvs, int *tlvs_len) ...@@ -1423,7 +1423,7 @@ static bool ie_is_wps_ie(u8 **wpsie, u8 **tlvs, int *tlvs_len)
if ((ie[1] >= 4) && if ((ie[1] >= 4) &&
!bcmp((const void *)&ie[2], (const void *)(WPA_OUI "\x04"), 4)) { !bcmp((const void *)&ie[2], (const void *)(WPA_OUI "\x04"), 4)) {
return TRUE; return true;
} }
ie += ie[1] + 2; ie += ie[1] + 2;
...@@ -2590,7 +2590,7 @@ wl_iw_set_encodeext(struct net_device *dev, ...@@ -2590,7 +2590,7 @@ wl_iw_set_encodeext(struct net_device *dev,
key.rxiv.hi = (ivptr[5] << 24) | (ivptr[4] << 16) | key.rxiv.hi = (ivptr[5] << 24) | (ivptr[4] << 16) |
(ivptr[3] << 8) | ivptr[2]; (ivptr[3] << 8) | ivptr[2];
key.rxiv.lo = (ivptr[1] << 8) | ivptr[0]; key.rxiv.lo = (ivptr[1] << 8) | ivptr[0];
key.iv_initialized = TRUE; key.iv_initialized = true;
} }
switch (iwe->alg) { switch (iwe->alg) {
...@@ -2797,11 +2797,11 @@ wl_iw_set_wpaauth(struct net_device *dev, ...@@ -2797,11 +2797,11 @@ wl_iw_set_wpaauth(struct net_device *dev,
} }
if (iw->privacy_invoked && !val) { if (iw->privacy_invoked && !val) {
WL_WSEC(("%s: %s: 'Privacy invoked' TRUE but clearing " WL_WSEC(("%s: %s: 'Privacy invoked' true but clearing "
"wsec, assuming " "we're a WPS enrollee\n", "wsec, assuming " "we're a WPS enrollee\n",
dev->name, __func__)); dev->name, __func__));
error = dev_wlc_intvar_set(dev, "is_WPS_enrollee", error = dev_wlc_intvar_set(dev, "is_WPS_enrollee",
TRUE); true);
if (error) { if (error) {
WL_WSEC(("Failed to set is_WPS_enrollee\n")); WL_WSEC(("Failed to set is_WPS_enrollee\n"));
return error; return error;
...@@ -2913,7 +2913,7 @@ wl_iw_set_wpaauth(struct net_device *dev, ...@@ -2913,7 +2913,7 @@ wl_iw_set_wpaauth(struct net_device *dev,
return error; return error;
} }
} else { } else {
iw->privacy_invoked = TRUE; iw->privacy_invoked = true;
error = dev_wlc_intvar_get(dev, "wsec", &wsec); error = dev_wlc_intvar_get(dev, "wsec", &wsec);
if (error) if (error)
return error; return error;
...@@ -2921,7 +2921,7 @@ wl_iw_set_wpaauth(struct net_device *dev, ...@@ -2921,7 +2921,7 @@ wl_iw_set_wpaauth(struct net_device *dev,
if (!(IW_WSEC_ENABLED(wsec))) { if (!(IW_WSEC_ENABLED(wsec))) {
error = dev_wlc_intvar_set(dev, error = dev_wlc_intvar_set(dev,
"is_WPS_enrollee", "is_WPS_enrollee",
TRUE); true);
if (error) { if (error) {
WL_WSEC(("Failed to set iovar " WL_WSEC(("Failed to set iovar "
"is_WPS_enrollee\n")); "is_WPS_enrollee\n"));
...@@ -3034,7 +3034,7 @@ wl_iw_get_wpaauth(struct net_device *dev, ...@@ -3034,7 +3034,7 @@ wl_iw_get_wpaauth(struct net_device *dev,
if (error) if (error)
return error; return error;
if (val) if (val)
paramval = TRUE; paramval = true;
else else
paramval = FALSE; paramval = FALSE;
break; break;
...@@ -3340,7 +3340,7 @@ wl_iw_conn_status_str(u32 event_type, u32 status, u32 reason, ...@@ -3340,7 +3340,7 @@ wl_iw_conn_status_str(u32 event_type, u32 status, u32 reason,
snprintf(stringBuf, buflen, "%s %s %02d %02d", snprintf(stringBuf, buflen, "%s %s %02d %02d",
name, cause, status, reason); name, cause, status, reason);
WL_INFORM(("Connection status: %s\n", stringBuf)); WL_INFORM(("Connection status: %s\n", stringBuf));
return TRUE; return true;
} else { } else {
return FALSE; return FALSE;
} }
...@@ -3356,7 +3356,7 @@ wl_iw_check_conn_fail(wl_event_msg_t *e, char *stringBuf, uint buflen) ...@@ -3356,7 +3356,7 @@ wl_iw_check_conn_fail(wl_event_msg_t *e, char *stringBuf, uint buflen)
u32 reason = ntoh32(e->reason); u32 reason = ntoh32(e->reason);
if (wl_iw_conn_status_str(event, status, reason, stringBuf, buflen)) { if (wl_iw_conn_status_str(event, status, reason, stringBuf, buflen)) {
return TRUE; return true;
} else } else
return FALSE; return FALSE;
} }
......
...@@ -185,7 +185,7 @@ typedef struct { ...@@ -185,7 +185,7 @@ typedef struct {
/* define BCMSMALL to remove misc features for memory-constrained environments */ /* define BCMSMALL to remove misc features for memory-constrained environments */
#define BCMSPACE #define BCMSPACE
#define bcmspace TRUE /* if (bcmspace) code is retained */ #define bcmspace true /* if (bcmspace) code is retained */
/* Max. nvram variable table size */ /* Max. nvram variable table size */
#define MAXSZ_NVRAM_VARS 4096 #define MAXSZ_NVRAM_VARS 4096
......
...@@ -88,7 +88,7 @@ extern int nvram_resetgpio_init(void *sih); ...@@ -88,7 +88,7 @@ extern int nvram_resetgpio_init(void *sih);
* Match an NVRAM variable. * Match an NVRAM variable.
* @param name name of variable to match * @param name name of variable to match
* @param match value to compare against value of variable * @param match value to compare against value of variable
* @return TRUE if variable is defined and its value is string equal * @return true if variable is defined and its value is string equal
* to match or FALSE otherwise * to match or FALSE otherwise
*/ */
static inline int nvram_match(char *name, char *match) static inline int nvram_match(char *name, char *match)
...@@ -101,7 +101,7 @@ static inline int nvram_match(char *name, char *match) ...@@ -101,7 +101,7 @@ static inline int nvram_match(char *name, char *match)
* Inversely match an NVRAM variable. * Inversely match an NVRAM variable.
* @param name name of variable to match * @param name name of variable to match
* @param match value to compare against value of variable * @param match value to compare against value of variable
* @return TRUE if variable is defined and its value is not string * @return true if variable is defined and its value is not string
* equal to invmatch or FALSE otherwise * equal to invmatch or FALSE otherwise
*/ */
static inline int nvram_invmatch(char *name, char *invmatch) static inline int nvram_invmatch(char *name, char *invmatch)
......
...@@ -482,7 +482,7 @@ ...@@ -482,7 +482,7 @@
typedef u32 mbool; typedef u32 mbool;
#define mboolset(mb, bit) ((mb) |= (bit)) /* set one bool */ #define mboolset(mb, bit) ((mb) |= (bit)) /* set one bool */
#define mboolclr(mb, bit) ((mb) &= ~(bit)) /* clear one bool */ #define mboolclr(mb, bit) ((mb) &= ~(bit)) /* clear one bool */
#define mboolisset(mb, bit) (((mb) & (bit)) != 0) /* TRUE if one bool is set */ #define mboolisset(mb, bit) (((mb) & (bit)) != 0) /* true if one bool is set */
#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val))) #define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val)))
/* power conversion */ /* power conversion */
......
...@@ -132,7 +132,7 @@ typedef u16 chanspec_t; ...@@ -132,7 +132,7 @@ typedef u16 chanspec_t;
* Verify the chanspec is using a legal set of parameters, i.e. that the * Verify the chanspec is using a legal set of parameters, i.e. that the
* chanspec specified a band, bw, ctl_sb and channel and that the * chanspec specified a band, bw, ctl_sb and channel and that the
* combination could be legal given any set of circumstances. * combination could be legal given any set of circumstances.
* RETURNS: TRUE is the chanspec is malformed, false if it looks good. * RETURNS: true is the chanspec is malformed, false if it looks good.
*/ */
extern bool wf_chspec_malformed(chanspec_t chanspec); extern bool wf_chspec_malformed(chanspec_t chanspec);
......
...@@ -44,7 +44,7 @@ typedef BWL_PRE_PACKED_STRUCT struct msgtrace_hdr { ...@@ -44,7 +44,7 @@ typedef BWL_PRE_PACKED_STRUCT struct msgtrace_hdr {
/* The hbus driver generates traces when sending a trace message. /* The hbus driver generates traces when sending a trace message.
* This causes endless traces. * This causes endless traces.
* This flag must be set to TRUE in any hbus traces. * This flag must be set to true in any hbus traces.
* The flag is reset in the function msgtrace_put. * The flag is reset in the function msgtrace_put.
* This prevents endless traces but generates hasardous * This prevents endless traces but generates hasardous
* lost of traces only in bus device code. * lost of traces only in bus device code.
......
...@@ -53,7 +53,7 @@ typedef void (*osl_wreg_fn_t) (void *ctx, void *reg, unsigned int val, ...@@ -53,7 +53,7 @@ typedef void (*osl_wreg_fn_t) (void *ctx, void *reg, unsigned int val,
#define OSL_SYSUPTIME() (0) #define OSL_SYSUPTIME() (0)
#define OSL_SYSUPTIME_SUPPORT FALSE #define OSL_SYSUPTIME_SUPPORT FALSE
#else #else
#define OSL_SYSUPTIME_SUPPORT TRUE #define OSL_SYSUPTIME_SUPPORT true
#endif /* OSL_SYSUPTIME */ #endif /* OSL_SYSUPTIME */
#endif /* _osl_h_ */ #endif /* _osl_h_ */
...@@ -34,10 +34,6 @@ typedef unsigned int uintptr; ...@@ -34,10 +34,6 @@ typedef unsigned int uintptr;
#define FALSE 0 #define FALSE 0
#endif #endif
#ifndef TRUE
#define TRUE 1 /* TRUE */
#endif
#ifndef OFF #ifndef OFF
#define OFF 0 #define OFF 0
#endif #endif
......
...@@ -640,14 +640,14 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, char *vars ...@@ -640,14 +640,14 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, char *vars
bzero((char *)pi, sizeof(phy_info_t)); bzero((char *)pi, sizeof(phy_info_t));
pi->regs = (d11regs_t *) regs; pi->regs = (d11regs_t *) regs;
pi->sh = sh; pi->sh = sh;
pi->phy_init_por = TRUE; pi->phy_init_por = true;
pi->phy_wreg_limit = PHY_WREG_LIMIT; pi->phy_wreg_limit = PHY_WREG_LIMIT;
pi->vars = vars; pi->vars = vars;
pi->txpwr_percent = 100; pi->txpwr_percent = 100;
pi->do_initcal = TRUE; pi->do_initcal = true;
pi->phycal_tempdelta = 0; pi->phycal_tempdelta = 0;
...@@ -713,7 +713,7 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, char *vars ...@@ -713,7 +713,7 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, char *vars
pi->rxiq_samps = PHY_NOISE_SAMPLE_LOG_NUM_NPHY; pi->rxiq_samps = PHY_NOISE_SAMPLE_LOG_NUM_NPHY;
pi->rxiq_antsel = ANT_RX_DIV_DEF; pi->rxiq_antsel = ANT_RX_DIV_DEF;
pi->watchdog_override = TRUE; pi->watchdog_override = true;
pi->cal_type_override = PHY_PERICAL_AUTO; pi->cal_type_override = PHY_PERICAL_AUTO;
...@@ -736,7 +736,7 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, char *vars ...@@ -736,7 +736,7 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, char *vars
pi->nphy_lastcal_temp = -50; pi->nphy_lastcal_temp = -50;
pi->phynoise_polling = TRUE; pi->phynoise_polling = true;
if (ISNPHY(pi) || ISLCNPHY(pi)) if (ISNPHY(pi) || ISLCNPHY(pi))
pi->phynoise_polling = FALSE; pi->phynoise_polling = FALSE;
...@@ -824,7 +824,7 @@ wlc_phy_get_phyversion(wlc_phy_t *pih, u16 *phytype, u16 *phyrev, ...@@ -824,7 +824,7 @@ wlc_phy_get_phyversion(wlc_phy_t *pih, u16 *phytype, u16 *phyrev,
*radioid = pi->pubpi.radioid; *radioid = pi->pubpi.radioid;
*radiover = pi->pubpi.radiorev; *radiover = pi->pubpi.radiorev;
return TRUE; return true;
} }
bool wlc_phy_get_encore(wlc_phy_t *pih) bool wlc_phy_get_encore(wlc_phy_t *pih)
...@@ -929,7 +929,7 @@ void WLBANDINITFN(wlc_phy_por_inform) (wlc_phy_t *ppi) ...@@ -929,7 +929,7 @@ void WLBANDINITFN(wlc_phy_por_inform) (wlc_phy_t *ppi)
{ {
phy_info_t *pi = (phy_info_t *) ppi; phy_info_t *pi = (phy_info_t *) ppi;
pi->phy_init_por = TRUE; pi->phy_init_por = true;
} }
void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock) void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock)
...@@ -980,7 +980,7 @@ void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec) ...@@ -980,7 +980,7 @@ void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec)
if (pi->init_in_progress) if (pi->init_in_progress)
return; return;
pi->init_in_progress = TRUE; pi->init_in_progress = true;
pi->radio_chanspec = chanspec; pi->radio_chanspec = chanspec;
...@@ -1012,7 +1012,7 @@ void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec) ...@@ -1012,7 +1012,7 @@ void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec)
wlapi_bmac_bw_set(pi->sh->physhim, wlapi_bmac_bw_set(pi->sh->physhim,
CHSPEC_BW(pi->radio_chanspec)); CHSPEC_BW(pi->radio_chanspec));
pi->nphy_gain_boost = TRUE; pi->nphy_gain_boost = true;
wlc_phy_switch_radio((wlc_phy_t *) pi, ON); wlc_phy_switch_radio((wlc_phy_t *) pi, ON);
...@@ -1021,7 +1021,7 @@ void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec) ...@@ -1021,7 +1021,7 @@ void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec)
pi->phy_init_por = FALSE; pi->phy_init_por = FALSE;
if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12))
wlc_phy_do_dummy_tx(pi, TRUE, OFF); wlc_phy_do_dummy_tx(pi, true, OFF);
if (!(ISNPHY(pi))) if (!(ISNPHY(pi)))
wlc_phy_txpower_update_shm(pi); wlc_phy_txpower_update_shm(pi);
...@@ -1043,7 +1043,7 @@ void wlc_phy_cal_init(wlc_phy_t *pih) ...@@ -1043,7 +1043,7 @@ void wlc_phy_cal_init(wlc_phy_t *pih)
if (cal_init) if (cal_init)
(*cal_init) (pi); (*cal_init) (pi);
pi->initialized = TRUE; pi->initialized = true;
} }
} }
...@@ -1652,7 +1652,7 @@ void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *txpwr) ...@@ -1652,7 +1652,7 @@ void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *txpwr)
WLC_NUM_RATES_MCS_2_STREAM); WLC_NUM_RATES_MCS_2_STREAM);
if (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC) if (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC)
mac_enabled = TRUE; mac_enabled = true;
if (mac_enabled) if (mac_enabled)
wlapi_suspend_mac_and_wait(pi->sh->physhim); wlapi_suspend_mac_and_wait(pi->sh->physhim);
...@@ -2436,7 +2436,7 @@ bool wlc_phy_test_ison(wlc_phy_t *ppi) ...@@ -2436,7 +2436,7 @@ bool wlc_phy_test_ison(wlc_phy_t *ppi)
bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval) bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval)
{ {
phy_info_t *pi = (phy_info_t *) ppi; phy_info_t *pi = (phy_info_t *) ppi;
bool ret = TRUE; bool ret = true;
wlc_phyreg_enter(ppi); wlc_phyreg_enter(ppi);
...@@ -2527,7 +2527,7 @@ wlc_phy_noise_calc_phy(phy_info_t *pi, u32 *cmplx_pwr, s8 *pwr_ant) ...@@ -2527,7 +2527,7 @@ wlc_phy_noise_calc_phy(phy_info_t *pi, u32 *cmplx_pwr, s8 *pwr_ant)
} }
pi->nphy_noise_index = pi->nphy_noise_index =
MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ); MODINC_POW2(pi->nphy_noise_index, PHY_NOISE_WINDOW_SZ);
return TRUE; return true;
} }
static void static void
...@@ -2536,7 +2536,7 @@ wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, u8 ch) ...@@ -2536,7 +2536,7 @@ wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, u8 ch)
phy_info_t *pi = (phy_info_t *) pih; phy_info_t *pi = (phy_info_t *) pih;
s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY;
bool sampling_in_progress = (pi->phynoise_state != 0); bool sampling_in_progress = (pi->phynoise_state != 0);
bool wait_for_intr = TRUE; bool wait_for_intr = true;
if (NORADIO_ENAB(pi->pubpi)) { if (NORADIO_ENAB(pi->pubpi)) {
return; return;
...@@ -2924,9 +2924,9 @@ void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag) ...@@ -2924,9 +2924,9 @@ void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag)
pi = (phy_info_t *) ppi; pi = (phy_info_t *) ppi;
if (ISLCNPHY(pi)) if (ISLCNPHY(pi))
wlc_lcnphy_deaf_mode(pi, TRUE); wlc_lcnphy_deaf_mode(pi, true);
else if (ISNPHY(pi)) else if (ISNPHY(pi))
wlc_nphy_deaf_mode(pi, TRUE); wlc_nphy_deaf_mode(pi, true);
else { else {
ASSERT(0); ASSERT(0);
} }
...@@ -3121,7 +3121,7 @@ void wlc_phy_cal_perical(wlc_phy_t *pih, u8 reason) ...@@ -3121,7 +3121,7 @@ void wlc_phy_cal_perical(wlc_phy_t *pih, u8 reason)
{ {
s16 nphy_currtemp = 0; s16 nphy_currtemp = 0;
s16 delta_temp = 0; s16 delta_temp = 0;
bool do_periodic_cal = TRUE; bool do_periodic_cal = true;
phy_info_t *pi = (phy_info_t *) pih; phy_info_t *pi = (phy_info_t *) pih;
if (!ISNPHY(pi)) if (!ISNPHY(pi))
...@@ -3153,7 +3153,7 @@ void wlc_phy_cal_perical(wlc_phy_t *pih, u8 reason) ...@@ -3153,7 +3153,7 @@ void wlc_phy_cal_perical(wlc_phy_t *pih, u8 reason)
wlc_phy_cal_perical_mphase_reset(pi); wlc_phy_cal_perical_mphase_reset(pi);
} }
pi->first_cal_after_assoc = TRUE; pi->first_cal_after_assoc = true;
pi->cal_type_override = PHY_PERICAL_FULL; pi->cal_type_override = PHY_PERICAL_FULL;
...@@ -3288,7 +3288,7 @@ u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih) ...@@ -3288,7 +3288,7 @@ u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih)
if (!pi->phy_txcore_heatedup) { if (!pi->phy_txcore_heatedup) {
if (nphy_currtemp >= pi->phy_txcore_disable_temp) { if (nphy_currtemp >= pi->phy_txcore_disable_temp) {
active_bitmap &= 0xFD; active_bitmap &= 0xFD;
pi->phy_txcore_heatedup = TRUE; pi->phy_txcore_heatedup = true;
} }
} else { } else {
if (nphy_currtemp <= pi->phy_txcore_enable_temp) { if (nphy_currtemp <= pi->phy_txcore_enable_temp) {
......
...@@ -52,7 +52,7 @@ ...@@ -52,7 +52,7 @@
#define BCM2064A0_IDCODE 0x0206417f #define BCM2064A0_IDCODE 0x0206417f
#define PHY_TPC_HW_OFF FALSE #define PHY_TPC_HW_OFF FALSE
#define PHY_TPC_HW_ON TRUE #define PHY_TPC_HW_ON true
#define PHY_PERICAL_DRIVERUP 1 #define PHY_PERICAL_DRIVERUP 1
#define PHY_PERICAL_WATCHDOG 2 #define PHY_PERICAL_WATCHDOG 2
......
...@@ -82,7 +82,7 @@ ...@@ -82,7 +82,7 @@
(0x7f << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT) (0x7f << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT)
#define wlc_lcnphy_enable_tx_gain_override(pi) \ #define wlc_lcnphy_enable_tx_gain_override(pi) \
wlc_lcnphy_set_tx_gain_override(pi, TRUE) wlc_lcnphy_set_tx_gain_override(pi, true)
#define wlc_lcnphy_disable_tx_gain_override(pi) \ #define wlc_lcnphy_disable_tx_gain_override(pi) \
wlc_lcnphy_set_tx_gain_override(pi, FALSE) wlc_lcnphy_set_tx_gain_override(pi, FALSE)
...@@ -1244,7 +1244,7 @@ void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec) ...@@ -1244,7 +1244,7 @@ void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec)
wlc_lcnphy_load_tx_iir_filter(pi, FALSE, 2); wlc_lcnphy_load_tx_iir_filter(pi, FALSE, 2);
} }
wlc_lcnphy_load_tx_iir_filter(pi, TRUE, 0); wlc_lcnphy_load_tx_iir_filter(pi, true, 0);
mod_phy_reg(pi, 0x4eb, (0x7 << 3), (1) << 3); mod_phy_reg(pi, 0x4eb, (0x7 << 3), (1) << 3);
...@@ -2049,7 +2049,7 @@ wlc_lcnphy_tx_iqlo_cal(phy_info_t *pi, ...@@ -2049,7 +2049,7 @@ wlc_lcnphy_tx_iqlo_cal(phy_info_t *pi,
txiqlocal_bestcoeffs, txiqlocal_bestcoeffs,
ARRAY_SIZE(pi_lcn->lcnphy_cal_results. ARRAY_SIZE(pi_lcn->lcnphy_cal_results.
txiqlocal_bestcoeffs), 16, 96); txiqlocal_bestcoeffs), 16, 96);
pi_lcn->lcnphy_cal_results.txiqlocal_bestcoeffs_valid = TRUE; pi_lcn->lcnphy_cal_results.txiqlocal_bestcoeffs_valid = true;
wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
&pi_lcn->lcnphy_cal_results. &pi_lcn->lcnphy_cal_results.
...@@ -2111,7 +2111,7 @@ static void wlc_lcnphy_idle_tssi_est(wlc_phy_t *ppi) ...@@ -2111,7 +2111,7 @@ static void wlc_lcnphy_idle_tssi_est(wlc_phy_t *ppi)
mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 1 << 4); mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 1 << 4);
mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 1 << 2); mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 1 << 2);
wlc_lcnphy_tssi_setup(pi); wlc_lcnphy_tssi_setup(pi);
wlc_phy_do_dummy_tx(pi, TRUE, OFF); wlc_phy_do_dummy_tx(pi, true, OFF);
idleTssi = ((read_phy_reg(pi, 0x4ab) & (0x1ff << 0)) idleTssi = ((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))
>> 0); >> 0);
...@@ -2267,7 +2267,7 @@ static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, u8 mode) ...@@ -2267,7 +2267,7 @@ static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, u8 mode)
write_radio_reg(pi, RADIO_2064_REG112, 0x6); write_radio_reg(pi, RADIO_2064_REG112, 0x6);
wlc_phy_do_dummy_tx(pi, TRUE, OFF); wlc_phy_do_dummy_tx(pi, true, OFF);
if (!tempsense_done(pi)) if (!tempsense_done(pi))
OSL_DELAY(10); OSL_DELAY(10);
...@@ -2633,7 +2633,7 @@ void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable) ...@@ -2633,7 +2633,7 @@ void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable)
mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12); mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);
mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14); mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);
wlc_lcnphy_set_trsw_override(pi, TRUE, FALSE); wlc_lcnphy_set_trsw_override(pi, true, FALSE);
mod_phy_reg(pi, 0x44d, (0x1 << 2), 0 << 2); mod_phy_reg(pi, 0x44d, (0x1 << 2), 0 << 2);
mod_phy_reg(pi, 0x44c, (0x1 << 2), 1 << 2); mod_phy_reg(pi, 0x44c, (0x1 << 2), 1 << 2);
...@@ -2741,7 +2741,7 @@ wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, u16 max_val, ...@@ -2741,7 +2741,7 @@ wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, u16 max_val,
pi->phy_tx_tone_freq = f_kHz; pi->phy_tx_tone_freq = f_kHz;
wlc_lcnphy_deaf_mode(pi, TRUE); wlc_lcnphy_deaf_mode(pi, true);
phy_bw = 40; phy_bw = 40;
if (pi_lcn->lcnphy_spurmod) { if (pi_lcn->lcnphy_spurmod) {
...@@ -2800,7 +2800,7 @@ void wlc_lcnphy_stop_tx_tone(phy_info_t *pi) ...@@ -2800,7 +2800,7 @@ void wlc_lcnphy_stop_tx_tone(phy_info_t *pi)
write_phy_reg(pi, 0x942, 0x7); write_phy_reg(pi, 0x942, 0x7);
write_phy_reg(pi, 0x93b, 0x2017); write_phy_reg(pi, 0x93b, 0x2017);
write_phy_reg(pi, 0x93c, 0x27c5); write_phy_reg(pi, 0x93c, 0x27c5);
wlc_lcnphy_txrx_spur_avoidance_mode(pi, TRUE); wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);
} }
playback_status = read_phy_reg(pi, 0x644); playback_status = read_phy_reg(pi, 0x644);
...@@ -3143,7 +3143,7 @@ wlc_lcnphy_rx_iq_est(phy_info_t *pi, ...@@ -3143,7 +3143,7 @@ wlc_lcnphy_rx_iq_est(phy_info_t *pi,
u8 wait_time, lcnphy_iq_est_t *iq_est) u8 wait_time, lcnphy_iq_est_t *iq_est)
{ {
int wait_count = 0; int wait_count = 0;
bool result = TRUE; bool result = true;
u8 phybw40; u8 phybw40;
phybw40 = CHSPEC_IS40(pi->radio_chanspec); phybw40 = CHSPEC_IS40(pi->radio_chanspec);
...@@ -3305,7 +3305,7 @@ wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp, ...@@ -3305,7 +3305,7 @@ wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp,
iqcomp[iqcomp_sz].a, iqcomp[iqcomp_sz].a,
(u16) (u16)
iqcomp[iqcomp_sz].b); iqcomp[iqcomp_sz].b);
result = TRUE; result = true;
break; break;
} }
} }
...@@ -3382,7 +3382,7 @@ wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp, ...@@ -3382,7 +3382,7 @@ wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp,
write_phy_reg(pi, 0x6da, 0xffff); write_phy_reg(pi, 0x6da, 0xffff);
or_phy_reg(pi, 0x6db, 0x3); or_phy_reg(pi, 0x6db, 0x3);
wlc_lcnphy_set_trsw_override(pi, tx_switch, rx_switch); wlc_lcnphy_set_trsw_override(pi, tx_switch, rx_switch);
wlc_lcnphy_rx_gain_override_enable(pi, TRUE); wlc_lcnphy_rx_gain_override_enable(pi, true);
tia_gain = 8; tia_gain = 8;
rx_pwr_threshold = 950; rx_pwr_threshold = 950;
...@@ -3457,7 +3457,7 @@ static void wlc_lcnphy_glacial_timer_based_cal(phy_info_t *pi) ...@@ -3457,7 +3457,7 @@ static void wlc_lcnphy_glacial_timer_based_cal(phy_info_t *pi)
(0 == (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC)); (0 == (R_REG(pi->sh->osh, &pi->regs->maccontrol) & MCTL_EN_MAC));
if (!suspend) if (!suspend)
wlapi_suspend_mac_and_wait(pi->sh->physhim); wlapi_suspend_mac_and_wait(pi->sh->physhim);
wlc_lcnphy_deaf_mode(pi, TRUE); wlc_lcnphy_deaf_mode(pi, true);
pi->phy_lastcal = pi->sh->now; pi->phy_lastcal = pi->sh->now;
pi->phy_forcecal = FALSE; pi->phy_forcecal = FALSE;
index = pi_lcn->lcnphy_current_index; index = pi_lcn->lcnphy_current_index;
...@@ -3502,7 +3502,7 @@ static void wlc_lcnphy_periodic_cal(phy_info_t *pi) ...@@ -3502,7 +3502,7 @@ static void wlc_lcnphy_periodic_cal(phy_info_t *pi)
wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000);
wlapi_suspend_mac_and_wait(pi->sh->physhim); wlapi_suspend_mac_and_wait(pi->sh->physhim);
} }
wlc_lcnphy_deaf_mode(pi, TRUE); wlc_lcnphy_deaf_mode(pi, true);
wlc_lcnphy_txpwrtbl_iqlo_cal(pi); wlc_lcnphy_txpwrtbl_iqlo_cal(pi);
...@@ -3510,9 +3510,9 @@ static void wlc_lcnphy_periodic_cal(phy_info_t *pi) ...@@ -3510,9 +3510,9 @@ static void wlc_lcnphy_periodic_cal(phy_info_t *pi)
rx_iqcomp_sz = ARRAY_SIZE(lcnphy_rx_iqcomp_table_rev0); rx_iqcomp_sz = ARRAY_SIZE(lcnphy_rx_iqcomp_table_rev0);
if (LCNREV_IS(pi->pubpi.phy_rev, 1)) if (LCNREV_IS(pi->pubpi.phy_rev, 1))
wlc_lcnphy_rx_iq_cal(pi, NULL, 0, TRUE, FALSE, 1, 40); wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, FALSE, 1, 40);
else else
wlc_lcnphy_rx_iq_cal(pi, NULL, 0, TRUE, FALSE, 1, 127); wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, FALSE, 1, 127);
if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) { if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) {
...@@ -3654,7 +3654,7 @@ static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, chanspec_t chanspec) ...@@ -3654,7 +3654,7 @@ static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, chanspec_t chanspec)
si_pmu_pllupd(pi->sh->sih); si_pmu_pllupd(pi->sh->sih);
write_phy_reg(pi, 0x942, 0); write_phy_reg(pi, 0x942, 0);
wlc_lcnphy_txrx_spur_avoidance_mode(pi, TRUE); wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);
pi_lcn->lcnphy_spurmod = 0; pi_lcn->lcnphy_spurmod = 0;
mod_phy_reg(pi, 0x424, (0xff << 8), (0x1f) << 8); mod_phy_reg(pi, 0x424, (0xff << 8), (0x1f) << 8);
...@@ -4836,7 +4836,7 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(phy_info_t *pi) ...@@ -4836,7 +4836,7 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(phy_info_t *pi)
} }
} }
return TRUE; return true;
} }
void wlc_2064_vco_cal(phy_info_t *pi) void wlc_2064_vco_cal(phy_info_t *pi)
...@@ -5065,8 +5065,8 @@ bool wlc_phy_attach_lcnphy(phy_info_t *pi) ...@@ -5065,8 +5065,8 @@ bool wlc_phy_attach_lcnphy(phy_info_t *pi)
pi_lcn = pi->u.pi_lcnphy; pi_lcn = pi->u.pi_lcnphy;
if ((0 == (pi->sh->boardflags & BFL_NOPA)) && !NORADIO_ENAB(pi->pubpi)) { if ((0 == (pi->sh->boardflags & BFL_NOPA)) && !NORADIO_ENAB(pi->pubpi)) {
pi->hwpwrctrl = TRUE; pi->hwpwrctrl = true;
pi->hwpwrctrl_capable = TRUE; pi->hwpwrctrl_capable = true;
} }
pi->xtalfreq = si_alp_clock(pi->sh->sih); pi->xtalfreq = si_alp_clock(pi->sh->sih);
...@@ -5089,17 +5089,17 @@ bool wlc_phy_attach_lcnphy(phy_info_t *pi) ...@@ -5089,17 +5089,17 @@ bool wlc_phy_attach_lcnphy(phy_info_t *pi)
if ((pi->sh->boardflags & BFL_FEM) && (LCNREV_IS(pi->pubpi.phy_rev, 1))) { if ((pi->sh->boardflags & BFL_FEM) && (LCNREV_IS(pi->pubpi.phy_rev, 1))) {
if (pi_lcn->lcnphy_tempsense_option == 3) { if (pi_lcn->lcnphy_tempsense_option == 3) {
pi->hwpwrctrl = TRUE; pi->hwpwrctrl = true;
pi->hwpwrctrl_capable = TRUE; pi->hwpwrctrl_capable = true;
pi->temppwrctrl_capable = FALSE; pi->temppwrctrl_capable = FALSE;
} else { } else {
pi->hwpwrctrl = FALSE; pi->hwpwrctrl = FALSE;
pi->hwpwrctrl_capable = FALSE; pi->hwpwrctrl_capable = FALSE;
pi->temppwrctrl_capable = TRUE; pi->temppwrctrl_capable = true;
} }
} }
return TRUE; return true;
} }
static void wlc_lcnphy_set_rx_gain(phy_info_t *pi, u32 gain) static void wlc_lcnphy_set_rx_gain(phy_info_t *pi, u32 gain)
...@@ -5129,7 +5129,7 @@ static void wlc_lcnphy_set_rx_gain(phy_info_t *pi, u32 gain) ...@@ -5129,7 +5129,7 @@ static void wlc_lcnphy_set_rx_gain(phy_info_t *pi, u32 gain)
mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11); mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11);
mod_phy_reg(pi, 0x4e6, (0x3 << 3), lna1 << 3); mod_phy_reg(pi, 0x4e6, (0x3 << 3), lna1 << 3);
} }
wlc_lcnphy_rx_gain_override_enable(pi, TRUE); wlc_lcnphy_rx_gain_override_enable(pi, true);
} }
static u32 wlc_lcnphy_get_receive_power(phy_info_t *pi, s32 *gain_index) static u32 wlc_lcnphy_get_receive_power(phy_info_t *pi, s32 *gain_index)
......
...@@ -609,7 +609,7 @@ wl_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, ...@@ -609,7 +609,7 @@ wl_ops_conf_tx(struct ieee80211_hw *hw, u16 queue,
params->txop, params->cw_min, params->cw_max, params->aifs)); params->txop, params->cw_min, params->cw_max, params->aifs));
WL_LOCK(wl); WL_LOCK(wl);
wlc_wme_setparams(wl->wlc, queue, (void *)params, TRUE); wlc_wme_setparams(wl->wlc, queue, (void *)params, true);
WL_UNLOCK(wl); WL_UNLOCK(wl);
return 0; return 0;
...@@ -649,7 +649,7 @@ wl_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, ...@@ -649,7 +649,7 @@ wl_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID, pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID,
AMPDU_MAX_SCB_TID * PKTQ_LEN_DEFAULT); AMPDU_MAX_SCB_TID * PKTQ_LEN_DEFAULT);
sta->ht_cap.ht_supported = TRUE; sta->ht_cap.ht_supported = true;
#ifdef WLC_HIGH_ONLY #ifdef WLC_HIGH_ONLY
sta->ht_cap.ampdu_factor = AMPDU_RX_FACTOR_16K; sta->ht_cap.ampdu_factor = AMPDU_RX_FACTOR_16K;
#else #else
...@@ -787,7 +787,7 @@ static wl_info_t *wl_attach(u16 vendor, u16 device, unsigned long regs, ...@@ -787,7 +787,7 @@ static wl_info_t *wl_attach(u16 vendor, u16 device, unsigned long regs,
} }
/* Requires pkttag feature */ /* Requires pkttag feature */
osh = osl_attach(btparam, bustype, TRUE); osh = osl_attach(btparam, bustype, true);
ASSERT(osh); ASSERT(osh);
#ifdef WLC_HIGH_ONLY #ifdef WLC_HIGH_ONLY
...@@ -1721,7 +1721,7 @@ void BCMFASTPATH wl_intrson(wl_info_t *wl) ...@@ -1721,7 +1721,7 @@ void BCMFASTPATH wl_intrson(wl_info_t *wl)
bool wl_alloc_dma_resources(wl_info_t *wl, uint addrwidth) bool wl_alloc_dma_resources(wl_info_t *wl, uint addrwidth)
{ {
return TRUE; return true;
} }
u32 BCMFASTPATH wl_intrsoff(wl_info_t *wl) u32 BCMFASTPATH wl_intrsoff(wl_info_t *wl)
...@@ -1834,7 +1834,7 @@ static void BCMFASTPATH wl_dpc(unsigned long data) ...@@ -1834,7 +1834,7 @@ static void BCMFASTPATH wl_dpc(unsigned long data)
INT_UNLOCK(wl, flags); INT_UNLOCK(wl, flags);
} }
wl->resched = wlc_dpc(wl->wlc, TRUE); wl->resched = wlc_dpc(wl->wlc, true);
} }
/* wlc_dpc() may bring the driver down */ /* wlc_dpc() may bring the driver down */
...@@ -1899,7 +1899,7 @@ static void _wl_timer(wl_timer_t *t) ...@@ -1899,7 +1899,7 @@ static void _wl_timer(wl_timer_t *t)
t->timer.expires = jiffies + t->ms * HZ / 1000; t->timer.expires = jiffies + t->ms * HZ / 1000;
atomic_inc(&t->wl->callbacks); atomic_inc(&t->wl->callbacks);
add_timer(&t->timer); add_timer(&t->timer);
t->set = TRUE; t->set = true;
} else } else
t->set = FALSE; t->set = FALSE;
...@@ -1957,14 +1957,14 @@ void wl_add_timer(wl_info_t *wl, wl_timer_t *t, uint ms, int periodic) ...@@ -1957,14 +1957,14 @@ void wl_add_timer(wl_info_t *wl, wl_timer_t *t, uint ms, int periodic)
t->ms = ms; t->ms = ms;
t->periodic = (bool) periodic; t->periodic = (bool) periodic;
t->set = TRUE; t->set = true;
t->timer.expires = jiffies + ms * HZ / 1000; t->timer.expires = jiffies + ms * HZ / 1000;
atomic_inc(&wl->callbacks); atomic_inc(&wl->callbacks);
add_timer(&t->timer); add_timer(&t->timer);
} }
/* return TRUE if timer successfully deleted, FALSE if still pending */ /* return true if timer successfully deleted, FALSE if still pending */
bool wl_del_timer(wl_info_t *wl, wl_timer_t *t) bool wl_del_timer(wl_info_t *wl, wl_timer_t *t)
{ {
if (t->set) { if (t->set) {
...@@ -1975,7 +1975,7 @@ bool wl_del_timer(wl_info_t *wl, wl_timer_t *t) ...@@ -1975,7 +1975,7 @@ bool wl_del_timer(wl_info_t *wl, wl_timer_t *t)
atomic_dec(&wl->callbacks); atomic_dec(&wl->callbacks);
} }
return TRUE; return true;
} }
void wl_free_timer(wl_info_t *wl, wl_timer_t *t) void wl_free_timer(wl_info_t *wl, wl_timer_t *t)
...@@ -2081,7 +2081,7 @@ static int BCMFASTPATH wl_start(struct sk_buff *skb, wl_info_t *wl) ...@@ -2081,7 +2081,7 @@ static int BCMFASTPATH wl_start(struct sk_buff *skb, wl_info_t *wl)
wl->txq_tail = skb; wl->txq_tail = skb;
if (wl->txq_dispatched == FALSE) { if (wl->txq_dispatched == FALSE) {
wl->txq_dispatched = TRUE; wl->txq_dispatched = true;
if (schedule_work(&wl->txq_task.work)) { if (schedule_work(&wl->txq_task.work)) {
atomic_inc(&wl->callbacks); atomic_inc(&wl->callbacks);
...@@ -2153,7 +2153,7 @@ static void wl_txq_free(wl_info_t *wl) ...@@ -2153,7 +2153,7 @@ static void wl_txq_free(wl_info_t *wl)
while (wl->txq_head) { while (wl->txq_head) {
skb = wl->txq_head; skb = wl->txq_head;
wl->txq_head = skb->prev; wl->txq_head = skb->prev;
PKTFREE(wl->osh, skb, TRUE); PKTFREE(wl->osh, skb, true);
} }
wl->txq_tail = NULL; wl->txq_tail = NULL;
...@@ -2224,7 +2224,7 @@ static void wl_rpcq_add(wl_info_t *wl, rpc_buf_t *buf) ...@@ -2224,7 +2224,7 @@ static void wl_rpcq_add(wl_info_t *wl, rpc_buf_t *buf)
wl->rpcq_tail = buf; wl->rpcq_tail = buf;
if (wl->rpcq_dispatched == FALSE) { if (wl->rpcq_dispatched == FALSE) {
wl->rpcq_dispatched = TRUE; wl->rpcq_dispatched = true;
wl_schedule_task(wl, wl_rpcq_dispatch, wl); wl_schedule_task(wl, wl_rpcq_dispatch, wl);
} }
......
...@@ -188,7 +188,7 @@ ampdu_info_t *wlc_ampdu_attach(wlc_info_t *wlc) ...@@ -188,7 +188,7 @@ ampdu_info_t *wlc_ampdu_attach(wlc_info_t *wlc)
ampdu->wlc = wlc; ampdu->wlc = wlc;
for (i = 0; i < AMPDU_MAX_SCB_TID; i++) for (i = 0; i < AMPDU_MAX_SCB_TID; i++)
ampdu->ini_enable[i] = TRUE; ampdu->ini_enable[i] = true;
/* Disable ampdu for VO by default */ /* Disable ampdu for VO by default */
ampdu->ini_enable[PRIO_8021D_VO] = FALSE; ampdu->ini_enable[PRIO_8021D_VO] = FALSE;
ampdu->ini_enable[PRIO_8021D_NC] = FALSE; ampdu->ini_enable[PRIO_8021D_NC] = FALSE;
...@@ -335,7 +335,7 @@ static void wlc_ffpld_init(ampdu_info_t *ampdu) ...@@ -335,7 +335,7 @@ static void wlc_ffpld_init(ampdu_info_t *ampdu)
static int wlc_ffpld_check_txfunfl(wlc_info_t *wlc, int fid) static int wlc_ffpld_check_txfunfl(wlc_info_t *wlc, int fid)
{ {
ampdu_info_t *ampdu = wlc->ampdu; ampdu_info_t *ampdu = wlc->ampdu;
u32 phy_rate = MCS_RATE(FFPLD_MAX_MCS, TRUE, FALSE); u32 phy_rate = MCS_RATE(FFPLD_MAX_MCS, true, FALSE);
u32 txunfl_ratio; u32 txunfl_ratio;
u8 max_mpdu; u8 max_mpdu;
u32 current_ampdu_cnt = 0; u32 current_ampdu_cnt = 0;
...@@ -463,7 +463,7 @@ static void wlc_ffpld_calc_mcs2ampdu_table(ampdu_info_t *ampdu, int f) ...@@ -463,7 +463,7 @@ static void wlc_ffpld_calc_mcs2ampdu_table(ampdu_info_t *ampdu, int f)
/* note : we divide/multiply by 100 to avoid integer overflows */ /* note : we divide/multiply by 100 to avoid integer overflows */
max_mpdu = max_mpdu =
min_t(u8, fifo->mcs2ampdu_table[FFPLD_MAX_MCS], AMPDU_NUM_MPDU_LEGACY); min_t(u8, fifo->mcs2ampdu_table[FFPLD_MAX_MCS], AMPDU_NUM_MPDU_LEGACY);
phy_rate = MCS_RATE(FFPLD_MAX_MCS, TRUE, FALSE); phy_rate = MCS_RATE(FFPLD_MAX_MCS, true, FALSE);
dma_rate = dma_rate =
(((phy_rate / 100) * (((phy_rate / 100) *
(max_mpdu * FFPLD_MPDU_SIZE - fifo->ampdu_pld_size)) (max_mpdu * FFPLD_MPDU_SIZE - fifo->ampdu_pld_size))
...@@ -474,7 +474,7 @@ static void wlc_ffpld_calc_mcs2ampdu_table(ampdu_info_t *ampdu, int f) ...@@ -474,7 +474,7 @@ static void wlc_ffpld_calc_mcs2ampdu_table(ampdu_info_t *ampdu, int f)
dma_rate = dma_rate >> 7; dma_rate = dma_rate >> 7;
for (i = 0; i < FFPLD_MAX_MCS; i++) { for (i = 0; i < FFPLD_MAX_MCS; i++) {
/* shifting to keep it within integer range */ /* shifting to keep it within integer range */
phy_rate = MCS_RATE(i, TRUE, FALSE) >> 7; phy_rate = MCS_RATE(i, true, FALSE) >> 7;
if (phy_rate > dma_rate) { if (phy_rate > dma_rate) {
tmp = ((fifo->ampdu_pld_size * phy_rate) / tmp = ((fifo->ampdu_pld_size * phy_rate) /
((phy_rate - dma_rate) * FFPLD_MPDU_SIZE)) + 1; ((phy_rate - dma_rate) * FFPLD_MPDU_SIZE)) + 1;
...@@ -514,7 +514,7 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec) ...@@ -514,7 +514,7 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec)
u8 rts_preamble_type = WLC_LONG_PREAMBLE; u8 rts_preamble_type = WLC_LONG_PREAMBLE;
u8 rts_fbr_preamble_type = WLC_LONG_PREAMBLE; u8 rts_fbr_preamble_type = WLC_LONG_PREAMBLE;
bool rr = TRUE, fbr = FALSE; bool rr = true, fbr = FALSE;
uint i, count = 0, fifo, seg_cnt = 0; uint i, count = 0, fifo, seg_cnt = 0;
u16 plen, len, seq = 0, mcl, mch, index, frameid, dma_len = 0; u16 plen, len, seq = 0, mcl, mch, index, frameid, dma_len = 0;
u32 ampdu_len, maxlen = 0; u32 ampdu_len, maxlen = 0;
...@@ -618,11 +618,11 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec) ...@@ -618,11 +618,11 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec)
/* Handle retry limits */ /* Handle retry limits */
if (txrate[0].count <= rr_retry_limit) { if (txrate[0].count <= rr_retry_limit) {
txrate[0].count++; txrate[0].count++;
rr = TRUE; rr = true;
fbr = FALSE; fbr = FALSE;
ASSERT(!fbr); ASSERT(!fbr);
} else { } else {
fbr = TRUE; fbr = true;
rr = FALSE; rr = FALSE;
txrate[1].count++; txrate[1].count++;
} }
...@@ -651,11 +651,11 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec) ...@@ -651,11 +651,11 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec)
fc = ltoh16(rts->fc); fc = ltoh16(rts->fc);
if ((fc & FC_KIND_MASK) == FC_RTS) { if ((fc & FC_KIND_MASK) == FC_RTS) {
mcl |= TXC_SENDRTS; mcl |= TXC_SENDRTS;
use_rts = TRUE; use_rts = true;
} }
if ((fc & FC_KIND_MASK) == FC_CTS) { if ((fc & FC_KIND_MASK) == FC_CTS) {
mcl |= TXC_SENDCTS; mcl |= TXC_SENDCTS;
use_cts = TRUE; use_cts = true;
} }
} else { } else {
mcl |= (TXC_AMPDU_MIDDLE << TXC_AMPDU_SHIFT); mcl |= (TXC_AMPDU_MIDDLE << TXC_AMPDU_SHIFT);
...@@ -739,7 +739,7 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec) ...@@ -739,7 +739,7 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec)
/* if (first mpdu for host agg) */ /* if (first mpdu for host agg) */
/* test whether to add more */ /* test whether to add more */
if ((MCS_RATE(mcs, TRUE, FALSE) >= f->dmaxferrate) && if ((MCS_RATE(mcs, true, FALSE) >= f->dmaxferrate) &&
(count == f->mcs2ampdu_table[mcs])) { (count == f->mcs2ampdu_table[mcs])) {
WL_AMPDU_ERR(("wl%d: PR 37644: stopping ampdu at %d for mcs %d", wlc->pub->unit, count, mcs)); WL_AMPDU_ERR(("wl%d: PR 37644: stopping ampdu at %d for mcs %d", wlc->pub->unit, count, mcs));
break; break;
...@@ -831,7 +831,7 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec) ...@@ -831,7 +831,7 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec)
} }
/* set the preload length */ /* set the preload length */
if (MCS_RATE(mcs, TRUE, FALSE) >= f->dmaxferrate) { if (MCS_RATE(mcs, true, FALSE) >= f->dmaxferrate) {
dma_len = min(dma_len, f->ampdu_pld_size); dma_len = min(dma_len, f->ampdu_pld_size);
txh->PreloadSize = htol16(dma_len); txh->PreloadSize = htol16(dma_len);
} else } else
...@@ -855,14 +855,14 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec) ...@@ -855,14 +855,14 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec)
wlc_compute_rtscts_dur(wlc, use_cts, rts_rspec, wlc_compute_rtscts_dur(wlc, use_cts, rts_rspec,
rspec, rts_preamble_type, rspec, rts_preamble_type,
preamble_type, ampdu_len, preamble_type, ampdu_len,
TRUE); true);
rts->durid = htol16(durid); rts->durid = htol16(durid);
durid = wlc_compute_rtscts_dur(wlc, use_cts, durid = wlc_compute_rtscts_dur(wlc, use_cts,
rts_rspec_fallback, rts_rspec_fallback,
rspec_fallback, rspec_fallback,
rts_fbr_preamble_type, rts_fbr_preamble_type,
fbr_preamble_type, fbr_preamble_type,
ampdu_len, TRUE); ampdu_len, true);
txh->RTSDurFallback = htol16(durid); txh->RTSDurFallback = htol16(durid);
/* set TxFesTimeNormal */ /* set TxFesTimeNormal */
txh->TxFesTimeNormal = rts->durid; txh->TxFesTimeNormal = rts->durid;
...@@ -891,7 +891,7 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec) ...@@ -891,7 +891,7 @@ wlc_sendampdu(ampdu_info_t *ampdu, wlc_txq_info_t *qi, void **pdu, int prec)
#ifdef WLC_HIGH_ONLY #ifdef WLC_HIGH_ONLY
if (wlc->rpc_agg & BCM_RPC_TP_HOST_AGG_AMPDU) if (wlc->rpc_agg & BCM_RPC_TP_HOST_AGG_AMPDU)
bcm_rpc_tp_agg_set(bcm_rpc_tp_get(wlc->rpc), bcm_rpc_tp_agg_set(bcm_rpc_tp_get(wlc->rpc),
BCM_RPC_TP_HOST_AGG_AMPDU, TRUE); BCM_RPC_TP_HOST_AGG_AMPDU, true);
#endif #endif
for (i = 0; i < count; i++) for (i = 0; i < count; i++)
wlc_txfifo(wlc, fifo, pkt[i], i == (count - 1), wlc_txfifo(wlc, fifo, pkt[i], i == (count - 1),
...@@ -959,7 +959,7 @@ wlc_ampdu_dotxstatus(ampdu_info_t *ampdu, struct scb *scb, void *p, ...@@ -959,7 +959,7 @@ wlc_ampdu_dotxstatus(ampdu_info_t *ampdu, struct scb *scb, void *p,
ASSERT(!ampdu->p); ASSERT(!ampdu->p);
ampdu->p = p; ampdu->p = p;
bcopy(txs, &ampdu->txs, sizeof(tx_status_t)); bcopy(txs, &ampdu->txs, sizeof(tx_status_t));
ampdu->waiting_status = TRUE; ampdu->waiting_status = true;
return; return;
#endif /* WLC_LOW */ #endif /* WLC_LOW */
} }
...@@ -1031,7 +1031,7 @@ wlc_ampdu_dotxstatus_complete(ampdu_info_t *ampdu, struct scb *scb, void *p, ...@@ -1031,7 +1031,7 @@ wlc_ampdu_dotxstatus_complete(ampdu_info_t *ampdu, struct scb *scb, void *p,
bool ba_recd = FALSE, ack_recd = FALSE; bool ba_recd = FALSE, ack_recd = FALSE;
u8 suc_mpdu = 0, tot_mpdu = 0; u8 suc_mpdu = 0, tot_mpdu = 0;
uint supr_status; uint supr_status;
bool update_rate = TRUE, retry = TRUE, tx_error = FALSE; bool update_rate = true, retry = true, tx_error = FALSE;
u16 mimoantsel = 0; u16 mimoantsel = 0;
u8 antselid = 0; u8 antselid = 0;
u8 retry_limit, rr_retry_limit; u8 retry_limit, rr_retry_limit;
...@@ -1087,7 +1087,7 @@ wlc_ampdu_dotxstatus_complete(ampdu_info_t *ampdu, struct scb *scb, void *p, ...@@ -1087,7 +1087,7 @@ wlc_ampdu_dotxstatus_complete(ampdu_info_t *ampdu, struct scb *scb, void *p,
bitmap[6] = (s2 >> 16) & 0xff; bitmap[6] = (s2 >> 16) & 0xff;
bitmap[7] = (s2 >> 24) & 0xff; bitmap[7] = (s2 >> 24) & 0xff;
ba_recd = TRUE; ba_recd = true;
} else { } else {
WLCNTINCR(ampdu->cnt->noba); WLCNTINCR(ampdu->cnt->noba);
if (supr_status) { if (supr_status) {
...@@ -1117,7 +1117,7 @@ wlc_ampdu_dotxstatus_complete(ampdu_info_t *ampdu, struct scb *scb, void *p, ...@@ -1117,7 +1117,7 @@ wlc_ampdu_dotxstatus_complete(ampdu_info_t *ampdu, struct scb *scb, void *p,
*/ */
if (wlc_ffpld_check_txfunfl(wlc, prio2fifo[tid]) if (wlc_ffpld_check_txfunfl(wlc, prio2fifo[tid])
> 0) { > 0) {
tx_error = TRUE; tx_error = true;
#ifdef WLC_HIGH_ONLY #ifdef WLC_HIGH_ONLY
/* With BMAC, TX Underflows should not happen */ /* With BMAC, TX Underflows should not happen */
WL_ERROR(("wl%d: BMAC TX Underflow?", WL_ERROR(("wl%d: BMAC TX Underflow?",
...@@ -1193,7 +1193,7 @@ wlc_ampdu_dotxstatus_complete(ampdu_info_t *ampdu, struct scb *scb, void *p, ...@@ -1193,7 +1193,7 @@ wlc_ampdu_dotxstatus_complete(ampdu_info_t *ampdu, struct scb *scb, void *p,
ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw,
p); p);
ack_recd = TRUE; ack_recd = true;
suc_mpdu++; suc_mpdu++;
} }
} }
...@@ -1262,7 +1262,7 @@ ampdu_cleanup_tid_ini(ampdu_info_t *ampdu, scb_ampdu_t *scb_ampdu, u8 tid, ...@@ -1262,7 +1262,7 @@ ampdu_cleanup_tid_ini(ampdu_info_t *ampdu, scb_ampdu_t *scb_ampdu, u8 tid,
ASSERT(ini == &scb_ampdu->ini[ini->tid]); ASSERT(ini == &scb_ampdu->ini[ini->tid]);
/* free all buffered tx packets */ /* free all buffered tx packets */
pktq_pflush(ampdu->wlc->osh, &scb_ampdu->txq, ini->tid, TRUE, NULL, 0); pktq_pflush(ampdu->wlc->osh, &scb_ampdu->txq, ini->tid, true, NULL, 0);
} }
/* initialize the initiator code for tid */ /* initialize the initiator code for tid */
...@@ -1318,7 +1318,7 @@ int wlc_ampdu_set(ampdu_info_t *ampdu, bool on) ...@@ -1318,7 +1318,7 @@ int wlc_ampdu_set(ampdu_info_t *ampdu, bool on)
bool wlc_ampdu_cap(ampdu_info_t *ampdu) bool wlc_ampdu_cap(ampdu_info_t *ampdu)
{ {
if (WLC_PHY_11N_CAP(ampdu->wlc->band)) if (WLC_PHY_11N_CAP(ampdu->wlc->band))
return TRUE; return true;
else else
return FALSE; return FALSE;
} }
...@@ -1333,13 +1333,13 @@ static void ampdu_update_max_txlen(ampdu_info_t *ampdu, u8 dur) ...@@ -1333,13 +1333,13 @@ static void ampdu_update_max_txlen(ampdu_info_t *ampdu, u8 dur)
rate = MCS_RATE(mcs, FALSE, FALSE); rate = MCS_RATE(mcs, FALSE, FALSE);
ampdu->max_txlen[mcs][0][0] = (rate * dur) >> 3; ampdu->max_txlen[mcs][0][0] = (rate * dur) >> 3;
/* 40 MHz, No SGI */ /* 40 MHz, No SGI */
rate = MCS_RATE(mcs, TRUE, FALSE); rate = MCS_RATE(mcs, true, FALSE);
ampdu->max_txlen[mcs][1][0] = (rate * dur) >> 3; ampdu->max_txlen[mcs][1][0] = (rate * dur) >> 3;
/* 20MHz, SGI */ /* 20MHz, SGI */
rate = MCS_RATE(mcs, FALSE, TRUE); rate = MCS_RATE(mcs, FALSE, true);
ampdu->max_txlen[mcs][0][1] = (rate * dur) >> 3; ampdu->max_txlen[mcs][0][1] = (rate * dur) >> 3;
/* 40 MHz, SGI */ /* 40 MHz, SGI */
rate = MCS_RATE(mcs, TRUE, TRUE); rate = MCS_RATE(mcs, true, true);
ampdu->max_txlen[mcs][1][1] = (rate * dur) >> 3; ampdu->max_txlen[mcs][1][1] = (rate * dur) >> 3;
} }
} }
......
...@@ -118,7 +118,7 @@ antsel_info_t *wlc_antsel_attach(wlc_info_t *wlc, osl_t *osh, ...@@ -118,7 +118,7 @@ antsel_info_t *wlc_antsel_attach(wlc_info_t *wlc, osl_t *osh,
/* Antenna selection availability */ /* Antenna selection availability */
if (((u16) getintvar(asi->pub->vars, "aa2g") == 7) || if (((u16) getintvar(asi->pub->vars, "aa2g") == 7) ||
((u16) getintvar(asi->pub->vars, "aa5g") == 7)) { ((u16) getintvar(asi->pub->vars, "aa5g") == 7)) {
asi->antsel_avail = TRUE; asi->antsel_avail = true;
} else } else
if (((u16) getintvar(asi->pub->vars, "aa2g") == if (((u16) getintvar(asi->pub->vars, "aa2g") ==
3) 3)
...@@ -139,18 +139,18 @@ antsel_info_t *wlc_antsel_attach(wlc_info_t *wlc, osl_t *osh, ...@@ -139,18 +139,18 @@ antsel_info_t *wlc_antsel_attach(wlc_info_t *wlc, osl_t *osh,
((u16) getintvar(asi->pub->vars, "aa5g") == 0)) { ((u16) getintvar(asi->pub->vars, "aa5g") == 0)) {
/* hack to match old 4321CB2 cards with 2of3 antenna switch */ /* hack to match old 4321CB2 cards with 2of3 antenna switch */
asi->antsel_type = ANTSEL_2x3; asi->antsel_type = ANTSEL_2x3;
asi->antsel_avail = TRUE; asi->antsel_avail = true;
} else if (asi->pub->boardflags2 & BFL2_2X4_DIV) { } else if (asi->pub->boardflags2 & BFL2_2X4_DIV) {
asi->antsel_type = ANTSEL_2x4; asi->antsel_type = ANTSEL_2x4;
asi->antsel_avail = TRUE; asi->antsel_avail = true;
} }
/* Set the antenna selection type for the low driver */ /* Set the antenna selection type for the low driver */
wlc_bmac_antsel_type_set(wlc_hw, asi->antsel_type); wlc_bmac_antsel_type_set(wlc_hw, asi->antsel_type);
/* Init (auto/manual) antenna selection */ /* Init (auto/manual) antenna selection */
wlc_antsel_init_cfg(asi, &asi->antcfg_11n, TRUE); wlc_antsel_init_cfg(asi, &asi->antcfg_11n, true);
wlc_antsel_init_cfg(asi, &asi->antcfg_cur, TRUE); wlc_antsel_init_cfg(asi, &asi->antcfg_cur, true);
return asi; return asi;
} }
......
...@@ -266,7 +266,7 @@ static u32 WLBANDINITFN(wlc_setband_inact) (wlc_info_t *wlc, uint bandunit) ...@@ -266,7 +266,7 @@ static u32 WLBANDINITFN(wlc_setband_inact) (wlc_info_t *wlc, uint bandunit)
/* Process received frames */ /* Process received frames */
/* /*
* Return TRUE if more frames need to be processed. FALSE otherwise. * Return true if more frames need to be processed. FALSE otherwise.
* Param 'bound' indicates max. # frames to process before break out. * Param 'bound' indicates max. # frames to process before break out.
*/ */
static bool BCMFASTPATH static bool BCMFASTPATH
...@@ -321,7 +321,7 @@ wlc_bmac_recv(wlc_hw_info_t *wlc_hw, uint fifo, bool bound) ...@@ -321,7 +321,7 @@ wlc_bmac_recv(wlc_hw_info_t *wlc_hw, uint fifo, bool bound)
} }
/* second-level interrupt processing /* second-level interrupt processing
* Return TRUE if another dpc needs to be re-scheduled. FALSE otherwise. * Return true if another dpc needs to be re-scheduled. FALSE otherwise.
* Param 'bounded' indicates if applicable loops should be bounded. * Param 'bounded' indicates if applicable loops should be bounded.
*/ */
bool BCMFASTPATH wlc_dpc(wlc_info_t *wlc, bool bounded) bool BCMFASTPATH wlc_dpc(wlc_info_t *wlc, bool bounded)
...@@ -440,7 +440,7 @@ bool BCMFASTPATH wlc_dpc(wlc_info_t *wlc, bool bounded) ...@@ -440,7 +440,7 @@ bool BCMFASTPATH wlc_dpc(wlc_info_t *wlc, bool bounded)
ASSERT(wlc_ps_check(wlc)); ASSERT(wlc_ps_check(wlc));
/* make sure the bound indication and the implementation are in sync */ /* make sure the bound indication and the implementation are in sync */
ASSERT(bounded == TRUE || wlc->macintstatus == 0); ASSERT(bounded == true || wlc->macintstatus == 0);
/* it isn't done and needs to be resched if macintstatus is non-zero */ /* it isn't done and needs to be resched if macintstatus is non-zero */
return wlc->macintstatus != 0; return wlc->macintstatus != 0;
...@@ -682,7 +682,7 @@ static bool wlc_bmac_attach_dmapio(wlc_info_t *wlc, uint j, bool wme) ...@@ -682,7 +682,7 @@ static bool wlc_bmac_attach_dmapio(wlc_info_t *wlc, uint j, bool wme)
/* initial ucode host flags */ /* initial ucode host flags */
wlc_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2); wlc_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
return TRUE; return true;
} }
static void wlc_bmac_detach_dmapio(wlc_hw_info_t *wlc_hw) static void wlc_bmac_detach_dmapio(wlc_hw_info_t *wlc_hw)
...@@ -721,7 +721,7 @@ int wlc_bmac_attach(wlc_info_t *wlc, u16 vendor, u16 device, uint unit, ...@@ -721,7 +721,7 @@ int wlc_bmac_attach(wlc_info_t *wlc, u16 vendor, u16 device, uint unit,
ASSERT(sizeof(wlc_d11rxhdr_t) <= WL_HWRXOFF); ASSERT(sizeof(wlc_d11rxhdr_t) <= WL_HWRXOFF);
wme = TRUE; wme = true;
wlc_hw = wlc->hw; wlc_hw = wlc->hw;
wlc_hw->wlc = wlc; wlc_hw->wlc = wlc;
...@@ -832,11 +832,11 @@ int wlc_bmac_attach(wlc_info_t *wlc, u16 vendor, u16 device, uint unit, ...@@ -832,11 +832,11 @@ int wlc_bmac_attach(wlc_info_t *wlc, u16 vendor, u16 device, uint unit,
if (D11REV_LE(wlc_hw->corerev, 4) if (D11REV_LE(wlc_hw->corerev, 4)
|| (wlc_hw->boardflags & BFL_NOPLLDOWN)) || (wlc_hw->boardflags & BFL_NOPLLDOWN))
wlc_bmac_pllreq(wlc_hw, TRUE, WLC_PLLREQ_SHARED); wlc_bmac_pllreq(wlc_hw, true, WLC_PLLREQ_SHARED);
if ((BUSTYPE(wlc_hw->sih->bustype) == PCI_BUS) if ((BUSTYPE(wlc_hw->sih->bustype) == PCI_BUS)
&& (si_pci_war16165(wlc_hw->sih))) && (si_pci_war16165(wlc_hw->sih)))
wlc->war16165 = TRUE; wlc->war16165 = true;
/* check device id(srom, nvram etc.) to set bands */ /* check device id(srom, nvram etc.) to set bands */
if (wlc_hw->deviceid == BCM43224_D11N_ID) { if (wlc_hw->deviceid == BCM43224_D11N_ID) {
...@@ -1239,8 +1239,8 @@ int wlc_bmac_up_finish(wlc_hw_info_t *wlc_hw) ...@@ -1239,8 +1239,8 @@ int wlc_bmac_up_finish(wlc_hw_info_t *wlc_hw)
{ {
WL_TRACE(("wl%d: %s:\n", wlc_hw->unit, __func__)); WL_TRACE(("wl%d: %s:\n", wlc_hw->unit, __func__));
wlc_hw->up = TRUE; wlc_hw->up = true;
wlc_phy_hw_state_upd(wlc_hw->band->pi, TRUE); wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
/* FULLY enable dynamic power control and d11 core interrupt */ /* FULLY enable dynamic power control and d11 core interrupt */
wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC);
...@@ -1958,7 +1958,7 @@ WLBANDINITFN(wlc_bmac_bsinit) (wlc_info_t *wlc, chanspec_t chanspec) ...@@ -1958,7 +1958,7 @@ WLBANDINITFN(wlc_bmac_bsinit) (wlc_info_t *wlc, chanspec_t chanspec)
wlc_bmac_update_slot_timing(wlc_hw, wlc_bmac_update_slot_timing(wlc_hw,
BAND_5G(wlc_hw->band-> BAND_5G(wlc_hw->band->
bandtype) ? TRUE : wlc_hw-> bandtype) ? true : wlc_hw->
shortslot); shortslot);
/* write phytype and phyvers */ /* write phytype and phyvers */
...@@ -2065,7 +2065,7 @@ void wlc_bmac_phy_reset(wlc_hw_info_t *wlc_hw) ...@@ -2065,7 +2065,7 @@ void wlc_bmac_phy_reset(wlc_hw_info_t *wlc_hw)
/* reset the PHY */ /* reset the PHY */
si_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE), si_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE),
(SICF_PRST | SICF_PCLKE)); (SICF_PRST | SICF_PCLKE));
phy_in_reset = TRUE; phy_in_reset = true;
} else { } else {
si_core_cflags(wlc_hw->sih, si_core_cflags(wlc_hw->sih,
...@@ -2149,12 +2149,12 @@ static bool wlc_isgoodchip(wlc_hw_info_t *wlc_hw) ...@@ -2149,12 +2149,12 @@ static bool wlc_isgoodchip(wlc_hw_info_t *wlc_hw)
return FALSE; return FALSE;
} }
return TRUE; return true;
} }
static bool wlc_validboardtype(wlc_hw_info_t *wlc_hw) static bool wlc_validboardtype(wlc_hw_info_t *wlc_hw)
{ {
bool goodboard = TRUE; bool goodboard = true;
uint boardrev = wlc_hw->boardrev; uint boardrev = wlc_hw->boardrev;
if (boardrev == 0) if (boardrev == 0)
...@@ -2200,7 +2200,7 @@ static char *wlc_get_macaddr(wlc_hw_info_t *wlc_hw) ...@@ -2200,7 +2200,7 @@ static char *wlc_get_macaddr(wlc_hw_info_t *wlc_hw)
} }
/* /*
* Return TRUE if radio is disabled, otherwise FALSE. * Return true if radio is disabled, otherwise FALSE.
* hw radio disable signal is an external pin, users activate it asynchronously * hw radio disable signal is an external pin, users activate it asynchronously
* this function could be called when driver is down and w/o clock * this function could be called when driver is down and w/o clock
* it operates on different registers depending on corerev and boardflag. * it operates on different registers depending on corerev and boardflag.
...@@ -2282,7 +2282,7 @@ void wlc_bmac_hw_up(wlc_hw_info_t *wlc_hw) ...@@ -2282,7 +2282,7 @@ void wlc_bmac_hw_up(wlc_hw_info_t *wlc_hw)
wlc_phy_por_inform(wlc_hw->band->pi); wlc_phy_por_inform(wlc_hw->band->pi);
wlc_hw->ucode_loaded = FALSE; wlc_hw->ucode_loaded = FALSE;
wlc_hw->wlc->pub->hw_up = TRUE; wlc_hw->wlc->pub->hw_up = true;
if ((wlc_hw->boardflags & BFL_FEM) if ((wlc_hw->boardflags & BFL_FEM)
&& (CHIPID(wlc_hw->sih->chip) == BCM4313_CHIP_ID)) { && (CHIPID(wlc_hw->sih->chip) == BCM4313_CHIP_ID)) {
...@@ -2299,7 +2299,7 @@ static bool wlc_dma_rxreset(wlc_hw_info_t *wlc_hw, uint fifo) ...@@ -2299,7 +2299,7 @@ static bool wlc_dma_rxreset(wlc_hw_info_t *wlc_hw, uint fifo)
osl_t *osh; osl_t *osh;
if (D11REV_LT(wlc_hw->corerev, 12)) { if (D11REV_LT(wlc_hw->corerev, 12)) {
bool rxidle = TRUE; bool rxidle = true;
u16 rcv_frm_cnt = 0; u16 rcv_frm_cnt = 0;
osh = wlc_hw->osh; osh = wlc_hw->osh;
...@@ -2389,9 +2389,9 @@ void wlc_bmac_corereset(wlc_hw_info_t *wlc_hw, u32 flags) ...@@ -2389,9 +2389,9 @@ void wlc_bmac_corereset(wlc_hw_info_t *wlc_hw, u32 flags)
*/ */
wlc_hw->clk = FALSE; wlc_hw->clk = FALSE;
si_core_reset(wlc_hw->sih, flags, resetbits); si_core_reset(wlc_hw->sih, flags, resetbits);
wlc_hw->clk = TRUE; wlc_hw->clk = true;
if (wlc_hw->band && wlc_hw->band->pi) if (wlc_hw->band && wlc_hw->band->pi)
wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, TRUE); wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
wlc_mctrl_reset(wlc_hw); wlc_mctrl_reset(wlc_hw);
...@@ -2401,7 +2401,7 @@ void wlc_bmac_corereset(wlc_hw_info_t *wlc_hw, u32 flags) ...@@ -2401,7 +2401,7 @@ void wlc_bmac_corereset(wlc_hw_info_t *wlc_hw, u32 flags)
wlc_bmac_phy_reset(wlc_hw); wlc_bmac_phy_reset(wlc_hw);
/* turn on PHY_PLL */ /* turn on PHY_PLL */
wlc_bmac_core_phypll_ctl(wlc_hw, TRUE); wlc_bmac_core_phypll_ctl(wlc_hw, true);
/* clear sw intstatus */ /* clear sw intstatus */
wlc_hw->wlc->macintstatus = 0; wlc_hw->wlc->macintstatus = 0;
...@@ -2502,7 +2502,7 @@ static void wlc_coreinit(wlc_info_t *wlc) ...@@ -2502,7 +2502,7 @@ static void wlc_coreinit(wlc_info_t *wlc)
* 2) newer chips, driver wants to controls the fifo allocation * 2) newer chips, driver wants to controls the fifo allocation
*/ */
if (D11REV_GE(wlc_hw->corerev, 4)) if (D11REV_GE(wlc_hw->corerev, 4))
fifosz_fixup = TRUE; fifosz_fixup = true;
/* let the PSM run to the suspended state, set mode to BSS STA */ /* let the PSM run to the suspended state, set mode to BSS STA */
W_REG(osh, &regs->macintstatus, -1); W_REG(osh, &regs->macintstatus, -1);
...@@ -2539,7 +2539,7 @@ static void wlc_coreinit(wlc_info_t *wlc) ...@@ -2539,7 +2539,7 @@ static void wlc_coreinit(wlc_info_t *wlc)
} }
/* For old ucode, txfifo sizes needs to be modified(increased) for Corerev >= 9 */ /* For old ucode, txfifo sizes needs to be modified(increased) for Corerev >= 9 */
if (fifosz_fixup == TRUE) { if (fifosz_fixup == true) {
wlc_corerev_fifofixup(wlc_hw); wlc_corerev_fifofixup(wlc_hw);
} }
...@@ -2794,7 +2794,7 @@ static void wlc_ucode_download(wlc_hw_info_t *wlc_hw) ...@@ -2794,7 +2794,7 @@ static void wlc_ucode_download(wlc_hw_info_t *wlc_hw)
if (WLCISNPHY(wlc_hw->band)) { if (WLCISNPHY(wlc_hw->band)) {
wlc_ucode_write(wlc_hw, bcm43xx_16_mimo, wlc_ucode_write(wlc_hw, bcm43xx_16_mimo,
bcm43xx_16_mimosz); bcm43xx_16_mimosz);
wlc_hw->ucode_loaded = TRUE; wlc_hw->ucode_loaded = true;
} else } else
WL_ERROR(("%s: wl%d: unsupported phy in corerev %d\n", WL_ERROR(("%s: wl%d: unsupported phy in corerev %d\n",
__func__, wlc_hw->unit, wlc_hw->corerev)); __func__, wlc_hw->unit, wlc_hw->corerev));
...@@ -2802,7 +2802,7 @@ static void wlc_ucode_download(wlc_hw_info_t *wlc_hw) ...@@ -2802,7 +2802,7 @@ static void wlc_ucode_download(wlc_hw_info_t *wlc_hw)
if (WLCISLCNPHY(wlc_hw->band)) { if (WLCISLCNPHY(wlc_hw->band)) {
wlc_ucode_write(wlc_hw, bcm43xx_24_lcn, wlc_ucode_write(wlc_hw, bcm43xx_24_lcn,
bcm43xx_24_lcnsz); bcm43xx_24_lcnsz);
wlc_hw->ucode_loaded = TRUE; wlc_hw->ucode_loaded = true;
} else { } else {
WL_ERROR(("%s: wl%d: unsupported phy in corerev %d\n", WL_ERROR(("%s: wl%d: unsupported phy in corerev %d\n",
__func__, wlc_hw->unit, wlc_hw->corerev)); __func__, wlc_hw->unit, wlc_hw->corerev));
...@@ -2920,27 +2920,27 @@ void wlc_bmac_fifoerrors(wlc_hw_info_t *wlc_hw) ...@@ -2920,27 +2920,27 @@ void wlc_bmac_fifoerrors(wlc_hw_info_t *wlc_hw)
WL_ERROR(("wl%d: fifo %d: receive fifo overflow\n", WL_ERROR(("wl%d: fifo %d: receive fifo overflow\n",
unit, idx)); unit, idx));
WLCNTINCR(wlc_hw->wlc->pub->_cnt->rxoflo); WLCNTINCR(wlc_hw->wlc->pub->_cnt->rxoflo);
fatal = TRUE; fatal = true;
} }
if (intstatus & I_PC) { if (intstatus & I_PC) {
WL_ERROR(("wl%d: fifo %d: descriptor error\n", unit, WL_ERROR(("wl%d: fifo %d: descriptor error\n", unit,
idx)); idx));
WLCNTINCR(wlc_hw->wlc->pub->_cnt->dmade); WLCNTINCR(wlc_hw->wlc->pub->_cnt->dmade);
fatal = TRUE; fatal = true;
} }
if (intstatus & I_PD) { if (intstatus & I_PD) {
WL_ERROR(("wl%d: fifo %d: data error\n", unit, idx)); WL_ERROR(("wl%d: fifo %d: data error\n", unit, idx));
WLCNTINCR(wlc_hw->wlc->pub->_cnt->dmada); WLCNTINCR(wlc_hw->wlc->pub->_cnt->dmada);
fatal = TRUE; fatal = true;
} }
if (intstatus & I_DE) { if (intstatus & I_DE) {
WL_ERROR(("wl%d: fifo %d: descriptor protocol error\n", WL_ERROR(("wl%d: fifo %d: descriptor protocol error\n",
unit, idx)); unit, idx));
WLCNTINCR(wlc_hw->wlc->pub->_cnt->dmape); WLCNTINCR(wlc_hw->wlc->pub->_cnt->dmape);
fatal = TRUE; fatal = true;
} }
if (intstatus & I_RU) { if (intstatus & I_RU) {
...@@ -2952,7 +2952,7 @@ void wlc_bmac_fifoerrors(wlc_hw_info_t *wlc_hw) ...@@ -2952,7 +2952,7 @@ void wlc_bmac_fifoerrors(wlc_hw_info_t *wlc_hw)
WL_ERROR(("wl%d: fifo %d: transmit fifo underflow\n", WL_ERROR(("wl%d: fifo %d: transmit fifo underflow\n",
idx, unit)); idx, unit));
WLCNTINCR(wlc_hw->wlc->pub->_cnt->txuflo); WLCNTINCR(wlc_hw->wlc->pub->_cnt->txuflo);
fatal = TRUE; fatal = true;
} }
if (fatal) { if (fatal) {
...@@ -3107,7 +3107,7 @@ bool wlc_bmac_tx_fifo_suspended(wlc_hw_info_t *wlc_hw, uint tx_fifo) ...@@ -3107,7 +3107,7 @@ bool wlc_bmac_tx_fifo_suspended(wlc_hw_info_t *wlc_hw, uint tx_fifo)
if (dma_txsuspended(wlc_hw->di[tx_fifo]) && if (dma_txsuspended(wlc_hw->di[tx_fifo]) &&
(R_REG(wlc_hw->osh, &wlc_hw->regs->chnstatus) & (R_REG(wlc_hw->osh, &wlc_hw->regs->chnstatus) &
(1 << tx_fifo)) == 0) (1 << tx_fifo)) == 0)
return TRUE; return true;
return FALSE; return FALSE;
} }
...@@ -3167,7 +3167,7 @@ void wlc_bmac_tx_fifo_resume(wlc_hw_info_t *wlc_hw, uint tx_fifo) ...@@ -3167,7 +3167,7 @@ void wlc_bmac_tx_fifo_resume(wlc_hw_info_t *wlc_hw, uint tx_fifo)
* Read and clear macintmask and macintstatus and intstatus registers. * Read and clear macintmask and macintstatus and intstatus registers.
* This routine should be called with interrupts off * This routine should be called with interrupts off
* Return: * Return:
* -1 if DEVICEREMOVED(wlc) evaluates to TRUE; * -1 if DEVICEREMOVED(wlc) evaluates to true;
* 0 if the interrupt is not for us, or we are in some special cases; * 0 if the interrupt is not for us, or we are in some special cases;
* device interrupt status bits otherwise. * device interrupt status bits otherwise.
*/ */
...@@ -3262,7 +3262,7 @@ static inline u32 wlc_intstatus(wlc_info_t *wlc, bool in_isr) ...@@ -3262,7 +3262,7 @@ static inline u32 wlc_intstatus(wlc_info_t *wlc, bool in_isr)
} }
/* Update wlc->macintstatus and wlc->intstatus[]. */ /* Update wlc->macintstatus and wlc->intstatus[]. */
/* Return TRUE if they are updated successfully. FALSE otherwise */ /* Return true if they are updated successfully. FALSE otherwise */
bool wlc_intrsupd(wlc_info_t *wlc) bool wlc_intrsupd(wlc_info_t *wlc)
{ {
u32 macintstatus; u32 macintstatus;
...@@ -3279,13 +3279,13 @@ bool wlc_intrsupd(wlc_info_t *wlc) ...@@ -3279,13 +3279,13 @@ bool wlc_intrsupd(wlc_info_t *wlc)
/* update interrupt status in software */ /* update interrupt status in software */
wlc->macintstatus |= macintstatus; wlc->macintstatus |= macintstatus;
return TRUE; return true;
} }
/* /*
* First-level interrupt processing. * First-level interrupt processing.
* Return TRUE if this was our interrupt, FALSE otherwise. * Return true if this was our interrupt, FALSE otherwise.
* *wantdpc will be set to TRUE if further wlc_dpc() processing is required, * *wantdpc will be set to true if further wlc_dpc() processing is required,
* FALSE otherwise. * FALSE otherwise.
*/ */
bool BCMFASTPATH wlc_isr(wlc_info_t *wlc, bool *wantdpc) bool BCMFASTPATH wlc_isr(wlc_info_t *wlc, bool *wantdpc)
...@@ -3299,7 +3299,7 @@ bool BCMFASTPATH wlc_isr(wlc_info_t *wlc, bool *wantdpc) ...@@ -3299,7 +3299,7 @@ bool BCMFASTPATH wlc_isr(wlc_info_t *wlc, bool *wantdpc)
return FALSE; return FALSE;
/* read and clear macintstatus and intstatus registers */ /* read and clear macintstatus and intstatus registers */
macintstatus = wlc_intstatus(wlc, TRUE); macintstatus = wlc_intstatus(wlc, true);
if (macintstatus == 0xffffffff) if (macintstatus == 0xffffffff)
WL_ERROR(("DEVICEREMOVED detected in the ISR code path.\n")); WL_ERROR(("DEVICEREMOVED detected in the ISR code path.\n"));
...@@ -3308,13 +3308,13 @@ bool BCMFASTPATH wlc_isr(wlc_info_t *wlc, bool *wantdpc) ...@@ -3308,13 +3308,13 @@ bool BCMFASTPATH wlc_isr(wlc_info_t *wlc, bool *wantdpc)
if (macintstatus == 0) if (macintstatus == 0)
return FALSE; return FALSE;
*wantdpc = TRUE; *wantdpc = true;
/* save interrupt status bits */ /* save interrupt status bits */
ASSERT(wlc->macintstatus == 0); ASSERT(wlc->macintstatus == 0);
wlc->macintstatus = macintstatus; wlc->macintstatus = macintstatus;
return TRUE; return true;
} }
...@@ -3346,7 +3346,7 @@ static bool wlc_bmac_txstatus_corerev4(wlc_hw_info_t *wlc_hw) ...@@ -3346,7 +3346,7 @@ static bool wlc_bmac_txstatus_corerev4(wlc_hw_info_t *wlc_hw)
} }
if (fatal) if (fatal)
return TRUE; return true;
/* post more rbufs */ /* post more rbufs */
dma_rxfill(wlc_hw->di[RX_TXSTATUS_FIFO]); dma_rxfill(wlc_hw->di[RX_TXSTATUS_FIFO]);
...@@ -3371,7 +3371,7 @@ wlc_bmac_dotxstatus(wlc_hw_info_t *wlc_hw, tx_status_t *txs, u32 s2) ...@@ -3371,7 +3371,7 @@ wlc_bmac_dotxstatus(wlc_hw_info_t *wlc_hw, tx_status_t *txs, u32 s2)
} }
/* process tx completion events in BMAC /* process tx completion events in BMAC
* Return TRUE if more tx status need to be processed. FALSE otherwise. * Return true if more tx status need to be processed. FALSE otherwise.
*/ */
static bool BCMFASTPATH static bool BCMFASTPATH
wlc_bmac_txstatus(wlc_hw_info_t *wlc_hw, bool bound, bool *fatal) wlc_bmac_txstatus(wlc_hw_info_t *wlc_hw, bool bound, bool *fatal)
...@@ -3429,7 +3429,7 @@ wlc_bmac_txstatus(wlc_hw_info_t *wlc_hw, bool bound, bool *fatal) ...@@ -3429,7 +3429,7 @@ wlc_bmac_txstatus(wlc_hw_info_t *wlc_hw, bool bound, bool *fatal)
return 0; return 0;
if (n >= max_tx_num) if (n >= max_tx_num)
morepending = TRUE; morepending = true;
} }
if (!pktq_empty(&wlc->active_queue->q)) if (!pktq_empty(&wlc->active_queue->q))
...@@ -3755,7 +3755,7 @@ bool wlc_bmac_validate_chip_access(wlc_hw_info_t *wlc_hw) ...@@ -3755,7 +3755,7 @@ bool wlc_bmac_validate_chip_access(wlc_hw_info_t *wlc_hw)
return FALSE; return FALSE;
} }
return TRUE; return true;
} }
#define PHYPLL_WAIT_US 100000 #define PHYPLL_WAIT_US 100000
...@@ -4116,7 +4116,7 @@ void wlc_bmac_set_clk(wlc_hw_info_t *wlc_hw, bool on) ...@@ -4116,7 +4116,7 @@ void wlc_bmac_set_clk(wlc_hw_info_t *wlc_hw, bool on)
/* this will be true for all ai chips */ /* this will be true for all ai chips */
bool wlc_bmac_taclear(wlc_hw_info_t *wlc_hw, bool ta_ok) bool wlc_bmac_taclear(wlc_hw_info_t *wlc_hw, bool ta_ok)
{ {
return TRUE; return true;
} }
/* Lower down relevant GPIOs like LED when going down w/o /* Lower down relevant GPIOs like LED when going down w/o
...@@ -4150,7 +4150,7 @@ bool wlc_bmac_radio_hw(wlc_hw_info_t *wlc_hw, bool enable) ...@@ -4150,7 +4150,7 @@ bool wlc_bmac_radio_hw(wlc_hw_info_t *wlc_hw, bool enable)
if (PMUCTL_ENAB(wlc_hw->sih)) { if (PMUCTL_ENAB(wlc_hw->sih)) {
AND_REG(wlc_hw->osh, &wlc_hw->regs->clk_ctl_st, AND_REG(wlc_hw->osh, &wlc_hw->regs->clk_ctl_st,
~CCS_FORCEHWREQOFF); ~CCS_FORCEHWREQOFF);
si_pmu_radio_enable(wlc_hw->sih, TRUE); si_pmu_radio_enable(wlc_hw->sih, true);
} }
wlc_phy_anacore(wlc_hw->band->pi, ON); wlc_phy_anacore(wlc_hw->band->pi, ON);
...@@ -4172,7 +4172,7 @@ bool wlc_bmac_radio_hw(wlc_hw_info_t *wlc_hw, bool enable) ...@@ -4172,7 +4172,7 @@ bool wlc_bmac_radio_hw(wlc_hw_info_t *wlc_hw, bool enable)
} }
} }
return TRUE; return true;
} }
u16 wlc_bmac_rate_shm_offset(wlc_hw_info_t *wlc_hw, u8 rate) u16 wlc_bmac_rate_shm_offset(wlc_hw_info_t *wlc_hw, u8 rate)
......
...@@ -79,7 +79,7 @@ struct wlc_bsscfg { ...@@ -79,7 +79,7 @@ struct wlc_bsscfg {
bool wsec_restrict; /* drop unencrypted packets if wsec is enabled */ bool wsec_restrict; /* drop unencrypted packets if wsec is enabled */
bool eap_restrict; /* restrict data until 802.1X auth succeeds */ bool eap_restrict; /* restrict data until 802.1X auth succeeds */
u16 WPA_auth; /* WPA: authenticated key management */ u16 WPA_auth; /* WPA: authenticated key management */
bool wpa2_preauth; /* default is TRUE, wpa_cap sets value */ bool wpa2_preauth; /* default is true, wpa_cap sets value */
bool wsec_portopen; /* indicates keys are plumbed */ bool wsec_portopen; /* indicates keys are plumbed */
wsec_iv_t wpa_none_txiv; /* global txiv for WPA_NONE, tkip and aes */ wsec_iv_t wpa_none_txiv; /* global txiv for WPA_NONE, tkip and aes */
int wsec_index; /* 0-3: default tx key, -1: not set */ int wsec_index; /* 0-3: default tx key, -1: not set */
......
...@@ -692,7 +692,7 @@ wlc_channel_get_chanvec(struct wlc_info *wlc, const char *country_abbrev, ...@@ -692,7 +692,7 @@ wlc_channel_get_chanvec(struct wlc_info *wlc, const char *country_abbrev,
return FALSE; return FALSE;
wlc_locale_get_channels(locale, channels); wlc_locale_get_channels(locale, channels);
return TRUE; return true;
} }
/* set the driver's current country and regulatory information using a country code /* set the driver's current country and regulatory information using a country code
...@@ -773,7 +773,7 @@ wlc_set_country_common(wlc_cm_info_t *wlc_cm, ...@@ -773,7 +773,7 @@ wlc_set_country_common(wlc_cm_info_t *wlc_cm,
li_mimo = wlc_get_mimo_2g(country->locale_mimo_2G); li_mimo = wlc_get_mimo_2g(country->locale_mimo_2G);
if (li_mimo && (li_mimo->flags & WLC_NO_MIMO)) { if (li_mimo && (li_mimo->flags & WLC_NO_MIMO)) {
wlc_set_nmode(wlc, OFF); wlc_set_nmode(wlc, OFF);
wlc->stf->no_cddstbc = TRUE; wlc->stf->no_cddstbc = true;
} else { } else {
wlc->stf->no_cddstbc = FALSE; wlc->stf->no_cddstbc = FALSE;
if (N_ENAB(wlc->pub) != wlc->protection->nmode_user) if (N_ENAB(wlc->pub) != wlc->protection->nmode_user)
...@@ -985,7 +985,7 @@ static void wlc_channels_commit(wlc_cm_info_t *wlc_cm) ...@@ -985,7 +985,7 @@ static void wlc_channels_commit(wlc_cm_info_t *wlc_cm)
*/ */
if (NBANDS(wlc) > 1 || BAND_2G(wlc->band->bandtype)) { if (NBANDS(wlc) > 1 || BAND_2G(wlc->band->bandtype)) {
wlc_phy_chanspec_ch14_widefilter_set(wlc->band->pi, wlc_phy_chanspec_ch14_widefilter_set(wlc->band->pi,
wlc_japan(wlc) ? TRUE : wlc_japan(wlc) ? true :
FALSE); FALSE);
} }
...@@ -1511,7 +1511,7 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, ...@@ -1511,7 +1511,7 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec,
return; return;
} }
/* Returns TRUE if currently set country is Japan or variant */ /* Returns true if currently set country is Japan or variant */
bool wlc_japan(struct wlc_info *wlc) bool wlc_japan(struct wlc_info *wlc)
{ {
return wlc_japan_ccode(wlc->cmi->country_abbrev); return wlc_japan_ccode(wlc->cmi->country_abbrev);
...@@ -1583,7 +1583,7 @@ wlc_valid_chanspec_ext(wlc_cm_info_t *wlc_cm, chanspec_t chspec, bool dualband) ...@@ -1583,7 +1583,7 @@ wlc_valid_chanspec_ext(wlc_cm_info_t *wlc_cm, chanspec_t chspec, bool dualband)
/* check that the lower sideband allows an upper sideband */ /* check that the lower sideband allows an upper sideband */
if ((upper_sideband & (CH_UPPER_SB | CH_EWA_VALID)) == if ((upper_sideband & (CH_UPPER_SB | CH_EWA_VALID)) ==
(CH_UPPER_SB | CH_EWA_VALID)) (CH_UPPER_SB | CH_EWA_VALID))
return TRUE; return true;
return FALSE; return FALSE;
} }
#endif /* 40 MHZ */ #endif /* 40 MHZ */
...@@ -1598,5 +1598,5 @@ bool wlc_valid_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chspec) ...@@ -1598,5 +1598,5 @@ bool wlc_valid_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chspec)
bool wlc_valid_chanspec_db(wlc_cm_info_t *wlc_cm, chanspec_t chspec) bool wlc_valid_chanspec_db(wlc_cm_info_t *wlc_cm, chanspec_t chspec)
{ {
return wlc_valid_chanspec_ext(wlc_cm, chspec, TRUE); return wlc_valid_chanspec_ext(wlc_cm, chspec, true);
} }
...@@ -106,13 +106,13 @@ int wlc_eventq_down(wlc_eventq_t *eq) ...@@ -106,13 +106,13 @@ int wlc_eventq_down(wlc_eventq_t *eq)
if (!wl_del_timer(eq->wl, eq->timer)) if (!wl_del_timer(eq->wl, eq->timer))
callbacks++; callbacks++;
ASSERT(wlc_eventq_avail(eq) == TRUE); ASSERT(wlc_eventq_avail(eq) == true);
ASSERT(eq->workpending == FALSE); ASSERT(eq->workpending == FALSE);
eq->workpending = TRUE; eq->workpending = true;
if (eq->cb) if (eq->cb)
eq->cb(eq->wlc); eq->cb(eq->wlc);
ASSERT(eq->workpending == TRUE); ASSERT(eq->workpending == true);
eq->workpending = FALSE; eq->workpending = FALSE;
eq->tpending = FALSE; eq->tpending = FALSE;
} else { } else {
...@@ -153,7 +153,7 @@ void wlc_eventq_enq(wlc_eventq_t *eq, wlc_event_t *e) ...@@ -153,7 +153,7 @@ void wlc_eventq_enq(wlc_eventq_t *eq, wlc_event_t *e)
eq->head = eq->tail = e; eq->head = eq->tail = e;
if (!eq->tpending) { if (!eq->tpending) {
eq->tpending = TRUE; eq->tpending = true;
/* Use a zero-delay timer to trigger /* Use a zero-delay timer to trigger
* delayed processing of the event. * delayed processing of the event.
*/ */
...@@ -214,16 +214,16 @@ static void wlc_timer_cb(void *arg) ...@@ -214,16 +214,16 @@ static void wlc_timer_cb(void *arg)
{ {
struct wlc_eventq *eq = (struct wlc_eventq *)arg; struct wlc_eventq *eq = (struct wlc_eventq *)arg;
ASSERT(eq->tpending == TRUE); ASSERT(eq->tpending == true);
ASSERT(wlc_eventq_avail(eq) == TRUE); ASSERT(wlc_eventq_avail(eq) == true);
ASSERT(eq->workpending == FALSE); ASSERT(eq->workpending == FALSE);
eq->workpending = TRUE; eq->workpending = true;
if (eq->cb) if (eq->cb)
eq->cb(eq->wlc); eq->cb(eq->wlc);
ASSERT(wlc_eventq_avail(eq) == FALSE); ASSERT(wlc_eventq_avail(eq) == FALSE);
ASSERT(eq->tpending == TRUE); ASSERT(eq->tpending == true);
eq->workpending = FALSE; eq->workpending = FALSE;
eq->tpending = FALSE; eq->tpending = FALSE;
} }
...@@ -65,7 +65,7 @@ struct wlc_bsscfg; ...@@ -65,7 +65,7 @@ struct wlc_bsscfg;
#define WSEC_KEY(wlc, i) (((wlc)->wsec_keys[i] && (wlc)->wsec_keys[i]->len) ? \ #define WSEC_KEY(wlc, i) (((wlc)->wsec_keys[i] && (wlc)->wsec_keys[i]->len) ? \
(wlc)->wsec_keys[i] : NULL) (wlc)->wsec_keys[i] : NULL)
#define WSEC_SCB_KEY_VALID(scb) (((scb)->key && (scb)->key->len) ? TRUE : FALSE) #define WSEC_SCB_KEY_VALID(scb) (((scb)->key && (scb)->key->len) ? true : FALSE)
/* default key */ /* default key */
#define WSEC_BSS_DEFAULT_KEY(bsscfg) (((bsscfg)->wsec_index == -1) ? \ #define WSEC_BSS_DEFAULT_KEY(bsscfg) (((bsscfg)->wsec_index == -1) ? \
......
...@@ -119,7 +119,7 @@ typedef struct wlc_bss_list { ...@@ -119,7 +119,7 @@ typedef struct wlc_bss_list {
*/ */
#define WLC_PORTOPEN(cfg) \ #define WLC_PORTOPEN(cfg) \
(((cfg)->WPA_auth != WPA_AUTH_DISABLED && WSEC_ENABLED((cfg)->wsec)) ? \ (((cfg)->WPA_auth != WPA_AUTH_DISABLED && WSEC_ENABLED((cfg)->wsec)) ? \
(cfg)->wsec_portopen : TRUE) (cfg)->wsec_portopen : true)
#define PS_ALLOWED(wlc) wlc_ps_allowed(wlc) #define PS_ALLOWED(wlc) wlc_ps_allowed(wlc)
#define STAY_AWAKE(wlc) wlc_stay_awake(wlc) #define STAY_AWAKE(wlc) wlc_stay_awake(wlc)
...@@ -191,7 +191,7 @@ extern const u8 prio2fifo[]; ...@@ -191,7 +191,7 @@ extern const u8 prio2fifo[];
#define WLC_PLLREQ_FLIP 0x4 /* hold/release pll for some short operation */ #define WLC_PLLREQ_FLIP 0x4 /* hold/release pll for some short operation */
/* Do we support this rate? */ /* Do we support this rate? */
#define VALID_RATE_DBG(wlc, rspec) wlc_valid_rate(wlc, rspec, WLC_BAND_AUTO, TRUE) #define VALID_RATE_DBG(wlc, rspec) wlc_valid_rate(wlc, rspec, WLC_BAND_AUTO, true)
/* /*
* Macros to check if AP or STA is active. * Macros to check if AP or STA is active.
...@@ -270,7 +270,7 @@ typedef struct wlc_stf { ...@@ -270,7 +270,7 @@ typedef struct wlc_stf {
u16 phytxant; /* phyTx antenna setting in txheader */ u16 phytxant; /* phyTx antenna setting in txheader */
u8 ss_opmode; /* singlestream Operational mode, 0:siso; 1:cdd */ u8 ss_opmode; /* singlestream Operational mode, 0:siso; 1:cdd */
bool ss_algosel_auto; /* if TRUE, use wlc->stf->ss_algo_channel; */ bool ss_algosel_auto; /* if true, use wlc->stf->ss_algo_channel; */
/* else use wlc->band->stf->ss_mode_band; */ /* else use wlc->band->stf->ss_mode_band; */
u16 ss_algo_channel; /* ss based on per-channel algo: 0: SISO, 1: CDD 2: STBC */ u16 ss_algo_channel; /* ss based on per-channel algo: 0: SISO, 1: CDD 2: STBC */
u8 no_cddstbc; /* stf override, 1: no CDD (or STBC) allowed */ u8 no_cddstbc; /* stf override, 1: no CDD (or STBC) allowed */
...@@ -500,7 +500,7 @@ struct wlc_hw_info { ...@@ -500,7 +500,7 @@ struct wlc_hw_info {
#ifdef BCMSDIO #ifdef BCMSDIO
void *sdh; void *sdh;
#endif #endif
bool ucode_loaded; /* TRUE after ucode downloaded */ bool ucode_loaded; /* true after ucode downloaded */
#ifdef WLC_LOW_ONLY #ifdef WLC_LOW_ONLY
struct wl_timer *wdtimer; /* timer for watchdog routine */ struct wl_timer *wdtimer; /* timer for watchdog routine */
...@@ -765,7 +765,7 @@ struct wlc_info { ...@@ -765,7 +765,7 @@ struct wlc_info {
s8 barker_preamble; /* current Barker Preamble Mode */ s8 barker_preamble; /* current Barker Preamble Mode */
s8 shortslot_override; /* 11g ShortSlot override */ s8 shortslot_override; /* 11g ShortSlot override */
bool include_legacy_erp; /* include Legacy ERP info elt ID 47 as well as g ID 42 */ bool include_legacy_erp; /* include Legacy ERP info elt ID 47 as well as g ID 42 */
bool barker_overlap_control; /* TRUE: be aware of overlapping BSSs for barker */ bool barker_overlap_control; /* true: be aware of overlapping BSSs for barker */
bool ignore_bcns; /* override: ignore non shortslot bcns in a 11g network */ bool ignore_bcns; /* override: ignore non shortslot bcns in a 11g network */
bool legacy_probe; /* restricts probe requests to CCK rates */ bool legacy_probe; /* restricts probe requests to CCK rates */
...@@ -846,7 +846,7 @@ struct antsel_info { ...@@ -846,7 +846,7 @@ struct antsel_info {
/* sum the individual fifo tx pending packet counts */ /* sum the individual fifo tx pending packet counts */
#if defined(WLC_HIGH_ONLY) #if defined(WLC_HIGH_ONLY)
#define TXPKTPENDTOT(wlc) (wlc_rpctx_txpktpend((wlc)->rpctx, 0, TRUE)) #define TXPKTPENDTOT(wlc) (wlc_rpctx_txpktpend((wlc)->rpctx, 0, true))
#define TXPKTPENDGET(wlc, fifo) (wlc_rpctx_txpktpend((wlc)->rpctx, (fifo), FALSE)) #define TXPKTPENDGET(wlc, fifo) (wlc_rpctx_txpktpend((wlc)->rpctx, (fifo), FALSE))
#define TXPKTPENDINC(wlc, fifo, val) (wlc_rpctx_txpktpendinc((wlc)->rpctx, (fifo), (val))) #define TXPKTPENDINC(wlc, fifo, val) (wlc_rpctx_txpktpendinc((wlc)->rpctx, (fifo), (val)))
#define TXPKTPENDDEC(wlc, fifo, val) (wlc_rpctx_txpktpenddec((wlc)->rpctx, (fifo), (val))) #define TXPKTPENDDEC(wlc, fifo, val) (wlc_rpctx_txpktpenddec((wlc)->rpctx, (fifo), (val)))
......
...@@ -268,12 +268,12 @@ static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate) ...@@ -268,12 +268,12 @@ static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate)
return FALSE; return FALSE;
if (!check_brate) if (!check_brate)
return TRUE; return true;
/* error if no basic rates */ /* error if no basic rates */
for (idx = 0; idx < rs->count; idx++) { for (idx = 0; idx < rs->count; idx++) {
if (rs->rates[idx] & WLC_RATE_FLAG) if (rs->rates[idx] & WLC_RATE_FLAG)
return TRUE; return true;
} }
return FALSE; return FALSE;
} }
...@@ -326,7 +326,7 @@ wlc_rate_hwrs_filter_sort_validate(wlc_rateset_t *rs, ...@@ -326,7 +326,7 @@ wlc_rate_hwrs_filter_sort_validate(wlc_rateset_t *rs,
rs->mcs[i] = (rs->mcs[i] & hw_rs->mcs[i]); rs->mcs[i] = (rs->mcs[i] & hw_rs->mcs[i]);
if (wlc_rateset_valid(rs, check_brate)) if (wlc_rateset_valid(rs, check_brate))
return TRUE; return true;
else else
return FALSE; return FALSE;
} }
......
...@@ -34,7 +34,7 @@ struct wlc_rpc_phy { ...@@ -34,7 +34,7 @@ struct wlc_rpc_phy {
struct rpc_info *rpc; struct rpc_info *rpc;
}; };
#define RPCTX_ENAB(pub) (TRUE) #define RPCTX_ENAB(pub) (true)
extern rpctx_info_t *wlc_rpctx_attach(wlc_pub_t *pub, struct wlc_info *wlc); extern rpctx_info_t *wlc_rpctx_attach(wlc_pub_t *pub, struct wlc_info *wlc);
extern int wlc_rpctx_fifoinit(rpctx_info_t *rpctx, uint fifo, uint ntxd); extern int wlc_rpctx_fifoinit(rpctx_info_t *rpctx, uint fifo, uint ntxd);
extern void wlc_rpctx_detach(rpctx_info_t *rpctx); extern void wlc_rpctx_detach(rpctx_info_t *rpctx);
......
...@@ -80,5 +80,5 @@ struct scb { ...@@ -80,5 +80,5 @@ struct scb {
#define SCB_SEQNUM(scb, prio) ((scb)->seqnum[(prio)]) #define SCB_SEQNUM(scb, prio) ((scb)->seqnum[(prio)])
#define SCB_PS(a) NULL #define SCB_PS(a) NULL
#define SCB_STBC_CAP(a) ((a)->flags & SCB_STBCCAP) #define SCB_STBC_CAP(a) ((a)->flags & SCB_STBCCAP)
#define SCB_AMPDU(a) TRUE #define SCB_AMPDU(a) true
#endif /* _wlc_scb_h_ */ #endif /* _wlc_scb_h_ */
...@@ -79,7 +79,7 @@ static void wlc_stf_stbc_rx_ht_update(wlc_info_t *wlc, int val) ...@@ -79,7 +79,7 @@ static void wlc_stf_stbc_rx_ht_update(wlc_info_t *wlc, int val)
if (wlc->pub->up) { if (wlc->pub->up) {
wlc_update_beacon(wlc); wlc_update_beacon(wlc);
wlc_update_probe_resp(wlc, TRUE); wlc_update_probe_resp(wlc, true);
} }
} }
...@@ -97,12 +97,12 @@ void wlc_tempsense_upd(wlc_info_t *wlc) ...@@ -97,12 +97,12 @@ void wlc_tempsense_upd(wlc_info_t *wlc)
if (wlc->stf->txchain == wlc->stf->hw_txchain) { if (wlc->stf->txchain == wlc->stf->hw_txchain) {
if (txchain && (txchain < wlc->stf->hw_txchain)) { if (txchain && (txchain < wlc->stf->hw_txchain)) {
/* turn off 1 tx chain */ /* turn off 1 tx chain */
wlc_stf_txchain_set(wlc, txchain, TRUE); wlc_stf_txchain_set(wlc, txchain, true);
} }
} else if (wlc->stf->txchain < wlc->stf->hw_txchain) { } else if (wlc->stf->txchain < wlc->stf->hw_txchain) {
if (txchain == wlc->stf->hw_txchain) { if (txchain == wlc->stf->hw_txchain) {
/* turn back on txchain */ /* turn back on txchain */
wlc_stf_txchain_set(wlc, txchain, TRUE); wlc_stf_txchain_set(wlc, txchain, true);
} }
} }
} }
...@@ -172,7 +172,7 @@ static bool wlc_stf_stbc_tx_set(wlc_info_t *wlc, s32 int_val) ...@@ -172,7 +172,7 @@ static bool wlc_stf_stbc_tx_set(wlc_info_t *wlc, s32 int_val)
wlc->bandstate[BAND_2G_INDEX]->band_stf_stbc_tx = (s8) int_val; wlc->bandstate[BAND_2G_INDEX]->band_stf_stbc_tx = (s8) int_val;
wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = (s8) int_val; wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = (s8) int_val;
return TRUE; return true;
} }
bool wlc_stf_stbc_rx_set(wlc_info_t *wlc, s32 int_val) bool wlc_stf_stbc_rx_set(wlc_info_t *wlc, s32 int_val)
...@@ -189,7 +189,7 @@ bool wlc_stf_stbc_rx_set(wlc_info_t *wlc, s32 int_val) ...@@ -189,7 +189,7 @@ bool wlc_stf_stbc_rx_set(wlc_info_t *wlc, s32 int_val)
} }
wlc_stf_stbc_rx_ht_update(wlc, int_val); wlc_stf_stbc_rx_ht_update(wlc, int_val);
return TRUE; return true;
} }
static int wlc_stf_txcore_set(wlc_info_t *wlc, u8 Nsts, u8 core_mask) static int wlc_stf_txcore_set(wlc_info_t *wlc, u8 Nsts, u8 core_mask)
...@@ -421,7 +421,7 @@ int wlc_stf_attach(wlc_info_t *wlc) ...@@ -421,7 +421,7 @@ int wlc_stf_attach(wlc_info_t *wlc)
wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = OFF; wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = OFF;
if (WLC_STBC_CAP_PHY(wlc)) { if (WLC_STBC_CAP_PHY(wlc)) {
wlc->stf->ss_algosel_auto = TRUE; wlc->stf->ss_algosel_auto = true;
wlc->stf->ss_algo_channel = (u16) -1; /* Init the default value */ wlc->stf->ss_algo_channel = (u16) -1; /* Init the default value */
} }
return 0; return 0;
......
...@@ -39,7 +39,7 @@ get_erom_ent(si_t *sih, u32 **eromptr, u32 mask, u32 match) ...@@ -39,7 +39,7 @@ get_erom_ent(si_t *sih, u32 **eromptr, u32 mask, u32 match)
u32 ent; u32 ent;
uint inv = 0, nom = 0; uint inv = 0, nom = 0;
while (TRUE) { while (true) {
ent = R_REG(si_osh(sih), *eromptr); ent = R_REG(si_osh(sih), *eromptr);
(*eromptr)++; (*eromptr)++;
...@@ -224,7 +224,7 @@ void ai_scan(si_t *sih, void *regs, uint devid) ...@@ -224,7 +224,7 @@ void ai_scan(si_t *sih, void *regs, uint devid)
get_asd(sih, &eromptr, 0, 0, AD_ST_BRIDGE, &addrl, get_asd(sih, &eromptr, 0, 0, AD_ST_BRIDGE, &addrl,
&addrh, &sizel, &sizeh); &addrh, &sizel, &sizeh);
if (asd != 0) if (asd != 0)
br = TRUE; br = true;
else if ((addrh != 0) || (sizeh != 0) else if ((addrh != 0) || (sizeh != 0)
|| (sizel != SI_CORE_SIZE)) { || (sizel != SI_CORE_SIZE)) {
SI_ERROR(("First Slave ASD for core 0x%04x malformed " "(0x%08x)\n", cid, asd)); SI_ERROR(("First Slave ASD for core 0x%04x malformed " "(0x%08x)\n", cid, asd));
...@@ -507,7 +507,7 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) ...@@ -507,7 +507,7 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
if (BUSTYPE(sih->bustype) == SI_BUS) { if (BUSTYPE(sih->bustype) == SI_BUS) {
/* If internal bus, we can always get at everything */ /* If internal bus, we can always get at everything */
fast = TRUE; fast = true;
/* map if does not exist */ /* map if does not exist */
if (!sii->regs[coreidx]) { if (!sii->regs[coreidx]) {
sii->regs[coreidx] = REG_MAP(sii->coresba[coreidx], sii->regs[coreidx] = REG_MAP(sii->coresba[coreidx],
...@@ -521,14 +521,14 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) ...@@ -521,14 +521,14 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
if ((sii->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) { if ((sii->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) {
/* Chipc registers are mapped at 12KB */ /* Chipc registers are mapped at 12KB */
fast = TRUE; fast = true;
r = (u32 *) ((char *)sii->curmap + r = (u32 *) ((char *)sii->curmap +
PCI_16KB0_CCREGS_OFFSET + regoff); PCI_16KB0_CCREGS_OFFSET + regoff);
} else if (sii->pub.buscoreidx == coreidx) { } else if (sii->pub.buscoreidx == coreidx) {
/* pci registers are at either in the last 2KB of an 8KB window /* pci registers are at either in the last 2KB of an 8KB window
* or, in pcie and pci rev 13 at 8KB * or, in pcie and pci rev 13 at 8KB
*/ */
fast = TRUE; fast = true;
if (SI_FAST(sii)) if (SI_FAST(sii))
r = (u32 *) ((char *)sii->curmap + r = (u32 *) ((char *)sii->curmap +
PCI_16KB0_PCIREGS_OFFSET + PCI_16KB0_PCIREGS_OFFSET +
......
...@@ -936,7 +936,7 @@ otp_read_region(si_t *sih, int region, u16 *data, ...@@ -936,7 +936,7 @@ otp_read_region(si_t *sih, int region, u16 *data,
wasup = si_is_otp_powered(sih); wasup = si_is_otp_powered(sih);
if (!wasup) if (!wasup)
si_otp_power(sih, TRUE); si_otp_power(sih, true);
if (!si_is_otp_powered(sih) || si_is_otp_disabled(sih)) { if (!si_is_otp_powered(sih) || si_is_otp_disabled(sih)) {
err = BCME_NOTREADY; err = BCME_NOTREADY;
......
...@@ -410,7 +410,7 @@ int srom_parsecis(osl_t *osh, u8 *pcis[], uint ciscnt, char **vars, uint *count) ...@@ -410,7 +410,7 @@ int srom_parsecis(osl_t *osh, u8 *pcis[], uint ciscnt, char **vars, uint *count)
cis = *pcis++; cis = *pcis++;
i = 0; i = 0;
funcid = 0; funcid = 0;
standard_cis = TRUE; standard_cis = true;
do { do {
if (standard_cis) { if (standard_cis) {
tup = cis[i++]; tup = cis[i++];
...@@ -722,7 +722,7 @@ int srom_parsecis(osl_t *osh, u8 *pcis[], uint ciscnt, char **vars, uint *count) ...@@ -722,7 +722,7 @@ int srom_parsecis(osl_t *osh, u8 *pcis[], uint ciscnt, char **vars, uint *count)
if (tlen >= 5) if (tlen >= 5)
varbuf_append(&b, vstr_ag, 3, varbuf_append(&b, vstr_ag, 3,
cis[i + 4]); cis[i + 4]);
ag_init = TRUE; ag_init = true;
break; break;
case HNBU_ANT5G: case HNBU_ANT5G:
...@@ -1340,7 +1340,7 @@ int srom_parsecis(osl_t *osh, u8 *pcis[], uint ciscnt, char **vars, uint *count) ...@@ -1340,7 +1340,7 @@ int srom_parsecis(osl_t *osh, u8 *pcis[], uint ciscnt, char **vars, uint *count)
SROM3_SWRGN_OFF, SROM3_SWRGN_OFF,
&b); &b);
/* 2.4G antenna gain is included in SROM */ /* 2.4G antenna gain is included in SROM */
ag_init = TRUE; ag_init = true;
/* Ethernet MAC address is included in SROM */ /* Ethernet MAC address is included in SROM */
eabuf[0] = 0; eabuf[0] = 0;
boardnum = -1; boardnum = -1;
...@@ -1868,7 +1868,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) ...@@ -1868,7 +1868,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
if (si_is_sprom_available(sih)) { if (si_is_sprom_available(sih)) {
err = err =
sprom_read_pci(osh, sih, sromwindow, 0, srom, SROM_WORDS, sprom_read_pci(osh, sih, sromwindow, 0, srom, SROM_WORDS,
TRUE); true);
if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) || if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) ||
(((sih->buscoretype == PCIE_CORE_ID) (((sih->buscoretype == PCIE_CORE_ID)
...@@ -1878,7 +1878,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) ...@@ -1878,7 +1878,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
/* sromrev >= 4, read more */ /* sromrev >= 4, read more */
err = err =
sprom_read_pci(osh, sih, sromwindow, 0, srom, sprom_read_pci(osh, sih, sromwindow, 0, srom,
SROM4_WORDS, TRUE); SROM4_WORDS, true);
sromrev = srom[SROM4_CRCREV] & 0xff; sromrev = srom[SROM4_CRCREV] & 0xff;
if (err) if (err)
BS_ERROR(("%s: srom %d, bad crc\n", __func__, BS_ERROR(("%s: srom %d, bad crc\n", __func__,
...@@ -1916,7 +1916,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) ...@@ -1916,7 +1916,7 @@ static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
value = si_getdevpathvar(sih, "sromrev"); value = si_getdevpathvar(sih, "sromrev");
if (value) { if (value) {
sromrev = (u8) simple_strtoul(value, NULL, 0); sromrev = (u8) simple_strtoul(value, NULL, 0);
flash = TRUE; flash = true;
goto varscont; goto varscont;
} }
......
...@@ -26,24 +26,24 @@ ...@@ -26,24 +26,24 @@
* Verify the chanspec is using a legal set of parameters, i.e. that the * Verify the chanspec is using a legal set of parameters, i.e. that the
* chanspec specified a band, bw, ctl_sb and channel and that the * chanspec specified a band, bw, ctl_sb and channel and that the
* combination could be legal given any set of circumstances. * combination could be legal given any set of circumstances.
* RETURNS: TRUE is the chanspec is malformed, false if it looks good. * RETURNS: true is the chanspec is malformed, false if it looks good.
*/ */
bool wf_chspec_malformed(chanspec_t chanspec) bool wf_chspec_malformed(chanspec_t chanspec)
{ {
/* must be 2G or 5G band */ /* must be 2G or 5G band */
if (!CHSPEC_IS5G(chanspec) && !CHSPEC_IS2G(chanspec)) if (!CHSPEC_IS5G(chanspec) && !CHSPEC_IS2G(chanspec))
return TRUE; return true;
/* must be 20 or 40 bandwidth */ /* must be 20 or 40 bandwidth */
if (!CHSPEC_IS40(chanspec) && !CHSPEC_IS20(chanspec)) if (!CHSPEC_IS40(chanspec) && !CHSPEC_IS20(chanspec))
return TRUE; return true;
/* 20MHZ b/w must have no ctl sb, 40 must have a ctl sb */ /* 20MHZ b/w must have no ctl sb, 40 must have a ctl sb */
if (CHSPEC_IS20(chanspec)) { if (CHSPEC_IS20(chanspec)) {
if (!CHSPEC_SB_NONE(chanspec)) if (!CHSPEC_SB_NONE(chanspec))
return TRUE; return true;
} else { } else {
if (!CHSPEC_SB_UPPER(chanspec) && !CHSPEC_SB_LOWER(chanspec)) if (!CHSPEC_SB_UPPER(chanspec) && !CHSPEC_SB_LOWER(chanspec))
return TRUE; return true;
} }
return FALSE; return FALSE;
......
...@@ -30,7 +30,7 @@ bool bcm_is_wfa_ie(u8 *ie, u8 **tlvs, uint *tlvs_len, u8 type) ...@@ -30,7 +30,7 @@ bool bcm_is_wfa_ie(u8 *ie, u8 **tlvs, uint *tlvs_len, u8 type)
if ((ie[TLV_LEN_OFF] > (WFA_OUI_LEN + 1)) && if ((ie[TLV_LEN_OFF] > (WFA_OUI_LEN + 1)) &&
!bcmp(&ie[TLV_BODY_OFF], WFA_OUI, WFA_OUI_LEN) && !bcmp(&ie[TLV_BODY_OFF], WFA_OUI, WFA_OUI_LEN) &&
type == ie[TLV_BODY_OFF + WFA_OUI_LEN]) { type == ie[TLV_BODY_OFF + WFA_OUI_LEN]) {
return TRUE; return true;
} }
/* point to the next ie */ /* point to the next ie */
......
...@@ -167,7 +167,7 @@ typedef struct dma_info { ...@@ -167,7 +167,7 @@ typedef struct dma_info {
/* DMA Scatter-gather list is supported. Note this is limited to TX direction only */ /* DMA Scatter-gather list is supported. Note this is limited to TX direction only */
#ifdef BCMDMASGLISTOSL #ifdef BCMDMASGLISTOSL
#define DMASGLIST_ENAB TRUE #define DMASGLIST_ENAB true
#else #else
#define DMASGLIST_ENAB FALSE #define DMASGLIST_ENAB FALSE
#endif /* BCMDMASGLISTOSL */ #endif /* BCMDMASGLISTOSL */
...@@ -766,10 +766,10 @@ static bool _dma_descriptor_align(dma_info_t *di) ...@@ -766,10 +766,10 @@ static bool _dma_descriptor_align(dma_info_t *di)
return FALSE; return FALSE;
} }
} }
return TRUE; return true;
} }
/* return TRUE if this dma engine supports DmaExtendedAddrChanges, otherwise FALSE */ /* return true if this dma engine supports DmaExtendedAddrChanges, otherwise FALSE */
static bool _dma_isaddrext(dma_info_t *di) static bool _dma_isaddrext(dma_info_t *di)
{ {
if (DMA64_ENAB(di) && DMA64_MODE(di)) { if (DMA64_ENAB(di) && DMA64_MODE(di)) {
...@@ -781,13 +781,13 @@ static bool _dma_isaddrext(dma_info_t *di) ...@@ -781,13 +781,13 @@ static bool _dma_isaddrext(dma_info_t *di)
DMA_ERROR(("%s: _dma_isaddrext: DMA64 tx doesn't have AE set\n", di->name)); DMA_ERROR(("%s: _dma_isaddrext: DMA64 tx doesn't have AE set\n", di->name));
ASSERT(0); ASSERT(0);
} }
return TRUE; return true;
} else if (di->d64rxregs != NULL) { } else if (di->d64rxregs != NULL) {
if (!_dma64_addrext(di->osh, di->d64rxregs)) { if (!_dma64_addrext(di->osh, di->d64rxregs)) {
DMA_ERROR(("%s: _dma_isaddrext: DMA64 rx doesn't have AE set\n", di->name)); DMA_ERROR(("%s: _dma_isaddrext: DMA64 rx doesn't have AE set\n", di->name));
ASSERT(0); ASSERT(0);
} }
return TRUE; return true;
} }
return FALSE; return FALSE;
} else if (DMA32_ENAB(di)) { } else if (DMA32_ENAB(di)) {
...@@ -1104,12 +1104,12 @@ static bool BCMFASTPATH _dma_rxfill(dma_info_t *di) ...@@ -1104,12 +1104,12 @@ static bool BCMFASTPATH _dma_rxfill(dma_info_t *di)
if (DMA64_ENAB(di) && DMA64_MODE(di)) { if (DMA64_ENAB(di) && DMA64_MODE(di)) {
if (dma64_rxidle(di)) { if (dma64_rxidle(di)) {
DMA_ERROR(("%s: rxfill64: ring is empty !\n", di->name)); DMA_ERROR(("%s: rxfill64: ring is empty !\n", di->name));
ring_empty = TRUE; ring_empty = true;
} }
} else if (DMA32_ENAB(di)) { } else if (DMA32_ENAB(di)) {
if (dma32_rxidle(di)) { if (dma32_rxidle(di)) {
DMA_ERROR(("%s: rxfill32: ring is empty !\n", di->name)); DMA_ERROR(("%s: rxfill32: ring is empty !\n", di->name));
ring_empty = TRUE; ring_empty = true;
} }
} else } else
ASSERT(0); ASSERT(0);
...@@ -1237,7 +1237,7 @@ static void _dma_rxreclaim(dma_info_t *di) ...@@ -1237,7 +1237,7 @@ static void _dma_rxreclaim(dma_info_t *di)
DMA_TRACE(("%s: dma_rxreclaim\n", di->name)); DMA_TRACE(("%s: dma_rxreclaim\n", di->name));
while ((p = _dma_getnextrxp(di, TRUE))) while ((p = _dma_getnextrxp(di, true)))
PKTFREE(di->osh, p, FALSE); PKTFREE(di->osh, p, FALSE);
} }
...@@ -1501,7 +1501,7 @@ static void dma32_txreclaim(dma_info_t *di, txd_range_t range) ...@@ -1501,7 +1501,7 @@ static void dma32_txreclaim(dma_info_t *di, txd_range_t range)
return; return;
while ((p = dma32_getnexttxp(di, range))) while ((p = dma32_getnexttxp(di, range)))
PKTFREE(di->osh, p, TRUE); PKTFREE(di->osh, p, true);
} }
static bool dma32_txstopped(dma_info_t *di) static bool dma32_txstopped(dma_info_t *di)
...@@ -1576,7 +1576,7 @@ static bool dma32_alloc(dma_info_t *di, uint direction) ...@@ -1576,7 +1576,7 @@ static bool dma32_alloc(dma_info_t *di, uint direction)
ASSERT(IS_ALIGNED((uintptr) di->rxd32, align)); ASSERT(IS_ALIGNED((uintptr) di->rxd32, align));
} }
return TRUE; return true;
} }
static bool dma32_txreset(dma_info_t *di) static bool dma32_txreset(dma_info_t *di)
...@@ -1584,7 +1584,7 @@ static bool dma32_txreset(dma_info_t *di) ...@@ -1584,7 +1584,7 @@ static bool dma32_txreset(dma_info_t *di)
u32 status; u32 status;
if (di->ntxd == 0) if (di->ntxd == 0)
return TRUE; return true;
/* suspend tx DMA first */ /* suspend tx DMA first */
W_REG(di->osh, &di->d32txregs->control, XC_SE); W_REG(di->osh, &di->d32txregs->control, XC_SE);
...@@ -1609,7 +1609,7 @@ static bool dma32_rxidle(dma_info_t *di) ...@@ -1609,7 +1609,7 @@ static bool dma32_rxidle(dma_info_t *di)
DMA_TRACE(("%s: dma_rxidle\n", di->name)); DMA_TRACE(("%s: dma_rxidle\n", di->name));
if (di->nrxd == 0) if (di->nrxd == 0)
return TRUE; return true;
return ((R_REG(di->osh, &di->d32rxregs->status) & RS_CD_MASK) == return ((R_REG(di->osh, &di->d32rxregs->status) & RS_CD_MASK) ==
R_REG(di->osh, &di->d32rxregs->ptr)); R_REG(di->osh, &di->d32rxregs->ptr));
...@@ -1620,7 +1620,7 @@ static bool dma32_rxreset(dma_info_t *di) ...@@ -1620,7 +1620,7 @@ static bool dma32_rxreset(dma_info_t *di)
u32 status; u32 status;
if (di->nrxd == 0) if (di->nrxd == 0)
return TRUE; return true;
W_REG(di->osh, &di->d32rxregs->control, 0); W_REG(di->osh, &di->d32rxregs->control, 0);
SPINWAIT(((status = (R_REG(di->osh, SPINWAIT(((status = (R_REG(di->osh,
...@@ -1641,7 +1641,7 @@ static bool dma32_rxenabled(dma_info_t *di) ...@@ -1641,7 +1641,7 @@ static bool dma32_rxenabled(dma_info_t *di)
static bool dma32_txsuspendedidle(dma_info_t *di) static bool dma32_txsuspendedidle(dma_info_t *di)
{ {
if (di->ntxd == 0) if (di->ntxd == 0)
return TRUE; return true;
if (!(R_REG(di->osh, &di->d32txregs->control) & XC_SE)) if (!(R_REG(di->osh, &di->d32txregs->control) & XC_SE))
return 0; return 0;
...@@ -1771,7 +1771,7 @@ static int dma32_txfast(dma_info_t *di, void *p0, bool commit) ...@@ -1771,7 +1771,7 @@ static int dma32_txfast(dma_info_t *di, void *p0, bool commit)
outoftxd: outoftxd:
DMA_ERROR(("%s: dma_txfast: out of txds\n", di->name)); DMA_ERROR(("%s: dma_txfast: out of txds\n", di->name));
PKTFREE(di->osh, p0, TRUE); PKTFREE(di->osh, p0, true);
di->hnddma.txavail = 0; di->hnddma.txavail = 0;
di->hnddma.txnobuf++; di->hnddma.txnobuf++;
return -1; return -1;
...@@ -2070,7 +2070,7 @@ static void BCMFASTPATH dma64_txreclaim(dma_info_t *di, txd_range_t range) ...@@ -2070,7 +2070,7 @@ static void BCMFASTPATH dma64_txreclaim(dma_info_t *di, txd_range_t range)
while ((p = dma64_getnexttxp(di, range))) { while ((p = dma64_getnexttxp(di, range))) {
/* For unframed data, we don't have any packets to free */ /* For unframed data, we don't have any packets to free */
if (!(di->hnddma.dmactrlflags & DMA_CTRL_UNFRAMED)) if (!(di->hnddma.dmactrlflags & DMA_CTRL_UNFRAMED))
PKTFREE(di->osh, p, TRUE); PKTFREE(di->osh, p, true);
} }
} }
...@@ -2139,7 +2139,7 @@ static bool dma64_alloc(dma_info_t *di, uint direction) ...@@ -2139,7 +2139,7 @@ static bool dma64_alloc(dma_info_t *di, uint direction)
ASSERT(IS_ALIGNED((uintptr) di->rxd64, align)); ASSERT(IS_ALIGNED((uintptr) di->rxd64, align));
} }
return TRUE; return true;
} }
static bool dma64_txreset(dma_info_t *di) static bool dma64_txreset(dma_info_t *di)
...@@ -2147,7 +2147,7 @@ static bool dma64_txreset(dma_info_t *di) ...@@ -2147,7 +2147,7 @@ static bool dma64_txreset(dma_info_t *di)
u32 status; u32 status;
if (di->ntxd == 0) if (di->ntxd == 0)
return TRUE; return true;
/* suspend tx DMA first */ /* suspend tx DMA first */
W_REG(di->osh, &di->d64txregs->control, D64_XC_SE); W_REG(di->osh, &di->d64txregs->control, D64_XC_SE);
...@@ -2172,7 +2172,7 @@ static bool dma64_rxidle(dma_info_t *di) ...@@ -2172,7 +2172,7 @@ static bool dma64_rxidle(dma_info_t *di)
DMA_TRACE(("%s: dma_rxidle\n", di->name)); DMA_TRACE(("%s: dma_rxidle\n", di->name));
if (di->nrxd == 0) if (di->nrxd == 0)
return TRUE; return true;
return ((R_REG(di->osh, &di->d64rxregs->status0) & D64_RS0_CD_MASK) == return ((R_REG(di->osh, &di->d64rxregs->status0) & D64_RS0_CD_MASK) ==
(R_REG(di->osh, &di->d64rxregs->ptr) & D64_RS0_CD_MASK)); (R_REG(di->osh, &di->d64rxregs->ptr) & D64_RS0_CD_MASK));
...@@ -2183,7 +2183,7 @@ static bool dma64_rxreset(dma_info_t *di) ...@@ -2183,7 +2183,7 @@ static bool dma64_rxreset(dma_info_t *di)
u32 status; u32 status;
if (di->nrxd == 0) if (di->nrxd == 0)
return TRUE; return true;
W_REG(di->osh, &di->d64rxregs->control, 0); W_REG(di->osh, &di->d64rxregs->control, 0);
SPINWAIT(((status = SPINWAIT(((status =
...@@ -2205,7 +2205,7 @@ static bool dma64_txsuspendedidle(dma_info_t *di) ...@@ -2205,7 +2205,7 @@ static bool dma64_txsuspendedidle(dma_info_t *di)
{ {
if (di->ntxd == 0) if (di->ntxd == 0)
return TRUE; return true;
if (!(R_REG(di->osh, &di->d64txregs->control) & D64_XC_SE)) if (!(R_REG(di->osh, &di->d64txregs->control) & D64_XC_SE))
return 0; return 0;
...@@ -2419,7 +2419,7 @@ static int BCMFASTPATH dma64_txfast(dma_info_t *di, void *p0, bool commit) ...@@ -2419,7 +2419,7 @@ static int BCMFASTPATH dma64_txfast(dma_info_t *di, void *p0, bool commit)
outoftxd: outoftxd:
DMA_ERROR(("%s: dma_txfast: out of txds !!!\n", di->name)); DMA_ERROR(("%s: dma_txfast: out of txds !!!\n", di->name));
PKTFREE(di->osh, p0, TRUE); PKTFREE(di->osh, p0, true);
di->hnddma.txavail = 0; di->hnddma.txavail = 0;
di->hnddma.txnobuf++; di->hnddma.txnobuf++;
return -1; return -1;
...@@ -2679,7 +2679,7 @@ uint dma_addrwidth(si_t *sih, void *dmaregs) ...@@ -2679,7 +2679,7 @@ uint dma_addrwidth(si_t *sih, void *dmaregs)
(sih->buscoretype == PCIE_CORE_ID))) (sih->buscoretype == PCIE_CORE_ID)))
return DMADDRWIDTH_64; return DMADDRWIDTH_64;
/* DMA64 is always 32-bit capable, AE is always TRUE */ /* DMA64 is always 32-bit capable, AE is always true */
ASSERT(_dma64_addrext(osh, (dma64regs_t *) dmaregs)); ASSERT(_dma64_addrext(osh, (dma64regs_t *) dmaregs));
return DMADDRWIDTH_32; return DMADDRWIDTH_32;
......
...@@ -299,7 +299,7 @@ typedef struct { ...@@ -299,7 +299,7 @@ typedef struct {
u32 res_mask; /* resources (chip specific) */ u32 res_mask; /* resources (chip specific) */
s8 action; /* action */ s8 action; /* action */
u32 depend_mask; /* changes to the dependancies mask */ u32 depend_mask; /* changes to the dependancies mask */
bool(*filter) (si_t *sih); /* action is taken when filter is NULL or return TRUE */ bool(*filter) (si_t *sih); /* action is taken when filter is NULL or return true */
} pmu_res_depend_t; } pmu_res_depend_t;
/* Resource dependancies mask change action */ /* Resource dependancies mask change action */
...@@ -562,26 +562,26 @@ static const pmu_res_depend_t bcm4330a0_res_depend[] = { ...@@ -562,26 +562,26 @@ static const pmu_res_depend_t bcm4330a0_res_depend[] = {
PMURES_BIT(RES4330_HT_AVAIL), RES_DEPEND_ADD, 0, NULL} PMURES_BIT(RES4330_HT_AVAIL), RES_DEPEND_ADD, 0, NULL}
}; };
/* TRUE if the power topology uses the buck boost to provide 3.3V to VDDIO_RF and WLAN PA */ /* true if the power topology uses the buck boost to provide 3.3V to VDDIO_RF and WLAN PA */
static bool si_pmu_res_depfltr_bb(si_t *sih) static bool si_pmu_res_depfltr_bb(si_t *sih)
{ {
return (sih->boardflags & BFL_BUCKBOOST) != 0; return (sih->boardflags & BFL_BUCKBOOST) != 0;
} }
/* TRUE if the power topology doesn't use the cbuck. Key on chiprev also if the chip is BCM4325. */ /* true if the power topology doesn't use the cbuck. Key on chiprev also if the chip is BCM4325. */
static bool si_pmu_res_depfltr_ncb(si_t *sih) static bool si_pmu_res_depfltr_ncb(si_t *sih)
{ {
return (sih->boardflags & BFL_NOCBUCK) != 0; return (sih->boardflags & BFL_NOCBUCK) != 0;
} }
/* TRUE if the power topology uses the PALDO */ /* true if the power topology uses the PALDO */
static bool si_pmu_res_depfltr_paldo(si_t *sih) static bool si_pmu_res_depfltr_paldo(si_t *sih)
{ {
return (sih->boardflags & BFL_PALDO) != 0; return (sih->boardflags & BFL_PALDO) != 0;
} }
/* TRUE if the power topology doesn't use the PALDO */ /* true if the power topology doesn't use the PALDO */
static bool si_pmu_res_depfltr_npaldo(si_t *sih) static bool si_pmu_res_depfltr_npaldo(si_t *sih)
{ {
return (sih->boardflags & BFL_PALDO) == 0; return (sih->boardflags & BFL_PALDO) == 0;
...@@ -2025,7 +2025,7 @@ si_pmu_res_uptime(si_t *sih, osl_t *osh, chipcregs_t *cc, ...@@ -2025,7 +2025,7 @@ si_pmu_res_uptime(si_t *sih, osl_t *osh, chipcregs_t *cc,
for (i = 0; i <= PMURES_MAX_RESNUM; i++) { for (i = 0; i <= PMURES_MAX_RESNUM; i++) {
if (!(deps & PMURES_BIT(i))) if (!(deps & PMURES_BIT(i)))
continue; continue;
deps &= ~si_pmu_res_deps(sih, osh, cc, PMURES_BIT(i), TRUE); deps &= ~si_pmu_res_deps(sih, osh, cc, PMURES_BIT(i), true);
} }
si_pmu_res_masks(sih, &min_mask, &max_mask); si_pmu_res_masks(sih, &min_mask, &max_mask);
deps &= ~min_mask; deps &= ~min_mask;
...@@ -2063,7 +2063,7 @@ si_pmu_res_deps(si_t *sih, osl_t *osh, chipcregs_t *cc, u32 rsrcs, ...@@ -2063,7 +2063,7 @@ si_pmu_res_deps(si_t *sih, osl_t *osh, chipcregs_t *cc, u32 rsrcs,
return !all ? deps : (deps return !all ? deps : (deps
? (deps | ? (deps |
si_pmu_res_deps(sih, osh, cc, deps, si_pmu_res_deps(sih, osh, cc, deps,
TRUE)) : 0); true)) : 0);
} }
/* power up/down OTP through PMU resources */ /* power up/down OTP through PMU resources */
...@@ -2107,7 +2107,7 @@ void si_pmu_otp_power(si_t *sih, osl_t *osh, bool on) ...@@ -2107,7 +2107,7 @@ void si_pmu_otp_power(si_t *sih, osl_t *osh, bool on)
u32 otps; u32 otps;
/* Figure out the dependancies (exclude min_res_mask) */ /* Figure out the dependancies (exclude min_res_mask) */
u32 deps = si_pmu_res_deps(sih, osh, cc, rsrcs, TRUE); u32 deps = si_pmu_res_deps(sih, osh, cc, rsrcs, true);
u32 min_mask = 0, max_mask = 0; u32 min_mask = 0, max_mask = 0;
si_pmu_res_masks(sih, &min_mask, &max_mask); si_pmu_res_masks(sih, &min_mask, &max_mask);
deps &= ~min_mask; deps &= ~min_mask;
...@@ -2491,10 +2491,10 @@ bool si_pmu_is_otp_powered(si_t *sih, osl_t *osh) ...@@ -2491,10 +2491,10 @@ bool si_pmu_is_otp_powered(si_t *sih, osl_t *osh)
case BCM43236_CHIP_ID: case BCM43236_CHIP_ID:
case BCM43235_CHIP_ID: case BCM43235_CHIP_ID:
case BCM43238_CHIP_ID: case BCM43238_CHIP_ID:
st = TRUE; st = true;
break; break;
default: default:
st = TRUE; st = true;
break; break;
} }
......
...@@ -160,7 +160,7 @@ osl_t *osl_attach(void *pdev, uint bustype, bool pkttag) ...@@ -160,7 +160,7 @@ osl_t *osl_attach(void *pdev, uint bustype, bool pkttag)
case PCI_BUS: case PCI_BUS:
case SI_BUS: case SI_BUS:
case PCMCIA_BUS: case PCMCIA_BUS:
osh->pub.mmbus = TRUE; osh->pub.mmbus = true;
break; break;
case JTAG_BUS: case JTAG_BUS:
case SDIO_BUS: case SDIO_BUS:
......
...@@ -290,7 +290,7 @@ static bool pcie_mdiosetblock(pcicore_info_t *pi, uint blk) ...@@ -290,7 +290,7 @@ static bool pcie_mdiosetblock(pcicore_info_t *pi, uint blk)
return FALSE; return FALSE;
} }
return TRUE; return true;
} }
static int static int
...@@ -363,7 +363,7 @@ pcie_mdioread(pcicore_info_t *pi, uint physmedia, uint regaddr, uint *regval) ...@@ -363,7 +363,7 @@ pcie_mdioread(pcicore_info_t *pi, uint physmedia, uint regaddr, uint *regval)
static int static int
pcie_mdiowrite(pcicore_info_t *pi, uint physmedia, uint regaddr, uint val) pcie_mdiowrite(pcicore_info_t *pi, uint physmedia, uint regaddr, uint val)
{ {
return pcie_mdioop(pi, physmedia, regaddr, TRUE, &val); return pcie_mdioop(pi, physmedia, regaddr, true, &val);
} }
/* ***** Support functions ***** */ /* ***** Support functions ***** */
...@@ -519,7 +519,7 @@ static void pcie_war_aspm_clkreq(pcicore_info_t *pi) ...@@ -519,7 +519,7 @@ static void pcie_war_aspm_clkreq(pcicore_info_t *pi)
if (pi->pcie_war_aspm_ovr != PCIE_ASPM_DISAB) { if (pi->pcie_war_aspm_ovr != PCIE_ASPM_DISAB) {
val16 |= SRSH_CLKREQ_ENB; val16 |= SRSH_CLKREQ_ENB;
pi->pcie_pr42767 = TRUE; pi->pcie_pr42767 = true;
} else } else
val16 &= ~SRSH_CLKREQ_ENB; val16 &= ~SRSH_CLKREQ_ENB;
...@@ -684,7 +684,7 @@ void pcicore_up(void *pch, int state) ...@@ -684,7 +684,7 @@ void pcicore_up(void *pch, int state)
return; return;
/* Restore L1 timer for better performance */ /* Restore L1 timer for better performance */
pcie_extendL1timer(pi, TRUE); pcie_extendL1timer(pi, true);
pcie_clkreq_upd(pi, state); pcie_clkreq_upd(pi, state);
} }
...@@ -739,7 +739,7 @@ bool pcicore_pmecap_fast(osl_t *osh) ...@@ -739,7 +739,7 @@ bool pcicore_pmecap_fast(osl_t *osh)
return (pmecap & PME_CAP_PM_STATES) != 0; return (pmecap & PME_CAP_PM_STATES) != 0;
} }
/* return TRUE if PM capability exists in the pci config space /* return true if PM capability exists in the pci config space
* Uses and caches the information using core handle * Uses and caches the information using core handle
*/ */
static bool pcicore_pmecap(pcicore_info_t *pi) static bool pcicore_pmecap(pcicore_info_t *pi)
...@@ -786,7 +786,7 @@ void pcicore_pmeen(void *pch) ...@@ -786,7 +786,7 @@ void pcicore_pmeen(void *pch)
} }
/* /*
* Return TRUE if PME status set * Return true if PME status set
*/ */
bool pcicore_pmestat(void *pch) bool pcicore_pmestat(void *pch)
{ {
......
...@@ -445,7 +445,7 @@ bool sb_taclear(si_t *sih, bool details) ...@@ -445,7 +445,7 @@ bool sb_taclear(si_t *sih, bool details)
} }
if (inband | timeout | serror) { if (inband | timeout | serror) {
rc = TRUE; rc = true;
SI_ERROR(("sb_taclear: inband 0x%x, serror 0x%x, timeout " SI_ERROR(("sb_taclear: inband 0x%x, serror 0x%x, timeout "
"0x%x!\n", inband, serror, timeout)); "0x%x!\n", inband, serror, timeout));
} }
......
...@@ -162,7 +162,7 @@ static bool si_buscore_prep(si_info_t *sii, uint bustype, uint devid, ...@@ -162,7 +162,7 @@ static bool si_buscore_prep(si_info_t *sii, uint bustype, uint devid,
} }
#endif /* defined(BCMSDIO) */ #endif /* defined(BCMSDIO) */
return TRUE; return true;
} }
static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype,
...@@ -226,11 +226,11 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, ...@@ -226,11 +226,11 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype,
if (cid == PCI_CORE_ID) { if (cid == PCI_CORE_ID) {
pciidx = i; pciidx = i;
pcirev = crev; pcirev = crev;
pci = TRUE; pci = true;
} else if (cid == PCIE_CORE_ID) { } else if (cid == PCIE_CORE_ID) {
pcieidx = i; pcieidx = i;
pcierev = crev; pcierev = crev;
pcie = TRUE; pcie = true;
} }
} }
#ifdef BCMSDIO #ifdef BCMSDIO
...@@ -302,7 +302,7 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, ...@@ -302,7 +302,7 @@ static bool si_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype,
/* return to the original core */ /* return to the original core */
si_setcoreidx(&sii->pub, *origidx); si_setcoreidx(&sii->pub, *origidx);
return TRUE; return true;
} }
static __used void si_nvram_process(si_info_t *sii, char *pvars) static __used void si_nvram_process(si_info_t *sii, char *pvars)
...@@ -681,7 +681,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, osl_t *osh, ...@@ -681,7 +681,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, osl_t *osh,
if (CHIPID(sih->chip) == BCM4331_CHIP_ID) { if (CHIPID(sih->chip) == BCM4331_CHIP_ID) {
/* Enable Ext PA lines depending on chip package option */ /* Enable Ext PA lines depending on chip package option */
si_chipcontrl_epa4331(sih, TRUE); si_chipcontrl_epa4331(sih, true);
} }
return sii; return sii;
...@@ -1164,7 +1164,7 @@ static void si_clkctl_setdelay(si_info_t *sii, void *chipcregs) ...@@ -1164,7 +1164,7 @@ static void si_clkctl_setdelay(si_info_t *sii, void *chipcregs)
/* Starting with 4318 it is ILP that is used for the delays */ /* Starting with 4318 it is ILP that is used for the delays */
slowmaxfreq = slowmaxfreq =
si_slowclk_freq(sii, (sii->pub.ccrev >= 10) ? FALSE : TRUE, cc); si_slowclk_freq(sii, (sii->pub.ccrev >= 10) ? FALSE : true, cc);
pll_on_delay = ((slowmaxfreq * pll_delay) + 999999) / 1000000; pll_on_delay = ((slowmaxfreq * pll_delay) + 999999) / 1000000;
fref_sel_delay = ((slowmaxfreq * FREF_DELAY) + 999999) / 1000000; fref_sel_delay = ((slowmaxfreq * FREF_DELAY) + 999999) / 1000000;
...@@ -1547,7 +1547,7 @@ static char *si_devpathvar(si_t *sih, char *var, int len, const char *name) ...@@ -1547,7 +1547,7 @@ static char *si_devpathvar(si_t *sih, char *var, int len, const char *name)
return var; return var;
} }
/* return TRUE if PCIE capability exists in the pci config space */ /* return true if PCIE capability exists in the pci config space */
static __used bool si_ispcie(si_info_t *sii) static __used bool si_ispcie(si_info_t *sii)
{ {
u8 cap_ptr; u8 cap_ptr;
...@@ -1561,7 +1561,7 @@ static __used bool si_ispcie(si_info_t *sii) ...@@ -1561,7 +1561,7 @@ static __used bool si_ispcie(si_info_t *sii)
if (!cap_ptr) if (!cap_ptr)
return FALSE; return FALSE;
return TRUE; return true;
} }
#ifdef BCMSDIO #ifdef BCMSDIO
...@@ -1937,7 +1937,7 @@ bool si_deviceremoved(si_t *sih) ...@@ -1937,7 +1937,7 @@ bool si_deviceremoved(si_t *sih)
ASSERT(sii->osh != NULL); ASSERT(sii->osh != NULL);
w = OSL_PCI_READ_CONFIG(sii->osh, PCI_CFG_VID, sizeof(u32)); w = OSL_PCI_READ_CONFIG(sii->osh, PCI_CFG_VID, sizeof(u32));
if ((w & 0xFFFF) != VENDOR_BROADCOM) if ((w & 0xFFFF) != VENDOR_BROADCOM)
return TRUE; return true;
break; break;
} }
return FALSE; return FALSE;
...@@ -1976,7 +1976,7 @@ bool si_is_sprom_available(si_t *sih) ...@@ -1976,7 +1976,7 @@ bool si_is_sprom_available(si_t *sih)
case BCM4331_CHIP_ID: case BCM4331_CHIP_ID:
return (sih->chipst & CST4331_SPROM_PRESENT) != 0; return (sih->chipst & CST4331_SPROM_PRESENT) != 0;
default: default:
return TRUE; return true;
} }
} }
...@@ -2012,7 +2012,7 @@ bool si_is_otp_powered(si_t *sih) ...@@ -2012,7 +2012,7 @@ bool si_is_otp_powered(si_t *sih)
{ {
if (PMUCTL_ENAB(sih)) if (PMUCTL_ENAB(sih))
return si_pmu_is_otp_powered(sih, si_osh(sih)); return si_pmu_is_otp_powered(sih, si_osh(sih));
return TRUE; return true;
} }
void si_otp_power(si_t *sih, bool on) void si_otp_power(si_t *sih, bool on)
......
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