提交 0cae165f 编写于 作者: A Alexandre Belloni 提交者: Jason Cooper

irqchip: atmel-aic5: The sama5d3 has 48 IRQs

The FUSE and RAM controllers don't have any connected IRQs, reducing the number
of IRQs to 48.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Link: https://lkml.kernel.org/r/1410446511-29477-1-git-send-email-alexandre.belloni@free-electrons.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
上级 7d1311b9
...@@ -343,7 +343,7 @@ static int __init aic5_of_init(struct device_node *node, ...@@ -343,7 +343,7 @@ static int __init aic5_of_init(struct device_node *node,
return 0; return 0;
} }
#define NR_SAMA5D3_IRQS 50 #define NR_SAMA5D3_IRQS 48
static int __init sama5d3_aic5_of_init(struct device_node *node, static int __init sama5d3_aic5_of_init(struct device_node *node,
struct device_node *parent) struct device_node *parent)
......
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