MIPS: Alchemy: RTC counter clocksource / clockevent support.
Add support for the 32 kHz counter1 (RTC) as clocksource / clockevent device. As a nice side effect, this also enables use of the 'wait' instruction for runtime idle power savings. If the counters aren't enabled/working properly, fall back on the cp0 counter clock code. Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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