Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
openanolis
cloud-kernel
提交
09d37c4b
cloud-kernel
项目概览
openanolis
/
cloud-kernel
大约 1 年 前同步成功
通知
153
Star
36
Fork
7
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
10
列表
看板
标记
里程碑
合并请求
2
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
cloud-kernel
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
10
Issue
10
列表
看板
标记
里程碑
合并请求
2
合并请求
2
Pages
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
提交
Issue看板
体验新版 GitCode,发现更多精彩内容 >>
提交
09d37c4b
编写于
11月 11, 2011
作者:
O
Olof Johansson
浏览文件
操作
浏览文件
下载
差异文件
Merge branch 'imx-fixes-for-arnd' of
git://git.pengutronix.de/git/imx/linux-2.6
into fixes
上级
3cdc3acc
f750ba9b
变更
5
隐藏空白更改
内联
并排
Showing
5 changed file
with
47 addition
and
20 deletion
+47
-20
arch/arm/mach-imx/Makefile.boot
arch/arm/mach-imx/Makefile.boot
+19
-15
arch/arm/mach-imx/clock-imx6q.c
arch/arm/mach-imx/clock-imx6q.c
+16
-1
arch/arm/mach-mx5/clock-mx51-mx53.c
arch/arm/mach-mx5/clock-mx51-mx53.c
+2
-2
arch/arm/plat-mxc/Kconfig
arch/arm/plat-mxc/Kconfig
+2
-2
drivers/mmc/host/sdhci-esdhc-imx.c
drivers/mmc/host/sdhci-esdhc-imx.c
+8
-0
未找到文件。
arch/arm/mach-imx/Makefile.boot
浏览文件 @
09d37c4b
zreladdr-$(CONFIG_
ARCH_
MX1)
+=
0x08008000
params_phys-$(CONFIG_
ARCH_
MX1)
:=
0x08000100
initrd_phys-$(CONFIG_
ARCH_
MX1)
:=
0x08800000
zreladdr-$(CONFIG_
SOC_I
MX1)
+=
0x08008000
params_phys-$(CONFIG_
SOC_I
MX1)
:=
0x08000100
initrd_phys-$(CONFIG_
SOC_I
MX1)
:=
0x08800000
zreladdr-$(CONFIG_
MACH_
MX21)
+=
0xC0008000
params_phys-$(CONFIG_
MACH_
MX21)
:=
0xC0000100
initrd_phys-$(CONFIG_
MACH_
MX21)
:=
0xC0800000
zreladdr-$(CONFIG_
SOC_I
MX21)
+=
0xC0008000
params_phys-$(CONFIG_
SOC_I
MX21)
:=
0xC0000100
initrd_phys-$(CONFIG_
SOC_I
MX21)
:=
0xC0800000
zreladdr-$(CONFIG_
ARCH_
MX25)
+=
0x80008000
params_phys-$(CONFIG_
ARCH_
MX25)
:=
0x80000100
initrd_phys-$(CONFIG_
ARCH_
MX25)
:=
0x80800000
zreladdr-$(CONFIG_
SOC_I
MX25)
+=
0x80008000
params_phys-$(CONFIG_
SOC_I
MX25)
:=
0x80000100
initrd_phys-$(CONFIG_
SOC_I
MX25)
:=
0x80800000
zreladdr-$(CONFIG_
MACH_
MX27)
+=
0xA0008000
params_phys-$(CONFIG_
MACH_
MX27)
:=
0xA0000100
initrd_phys-$(CONFIG_
MACH_
MX27)
:=
0xA0800000
zreladdr-$(CONFIG_
SOC_I
MX27)
+=
0xA0008000
params_phys-$(CONFIG_
SOC_I
MX27)
:=
0xA0000100
initrd_phys-$(CONFIG_
SOC_I
MX27)
:=
0xA0800000
zreladdr-$(CONFIG_ARCH_MX3)
+=
0x80008000
params_phys-$(CONFIG_ARCH_MX3)
:=
0x80000100
initrd_phys-$(CONFIG_ARCH_MX3)
:=
0x80800000
zreladdr-$(CONFIG_SOC_IMX31)
+=
0x80008000
params_phys-$(CONFIG_SOC_IMX31)
:=
0x80000100
initrd_phys-$(CONFIG_SOC_IMX31)
:=
0x80800000
zreladdr-$(CONFIG_SOC_IMX35)
+=
0x80008000
params_phys-$(CONFIG_SOC_IMX35)
:=
0x80000100
initrd_phys-$(CONFIG_SOC_IMX35)
:=
0x80800000
zreladdr-$(CONFIG_SOC_IMX6Q)
+=
0x10008000
params_phys-$(CONFIG_SOC_IMX6Q)
:=
0x10000100
...
...
arch/arm/mach-imx/clock-imx6q.c
浏览文件 @
09d37c4b
...
...
@@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
return
-
EINVAL
;
max_div
=
((
d
->
bm_pred
>>
d
->
bp_pred
)
+
1
)
*
((
d
->
bm_p
red
>>
d
->
bp_pred
)
+
1
);
((
d
->
bm_p
odf
>>
d
->
bp_podf
)
+
1
);
div
=
parent_rate
/
rate
;
if
(
div
==
0
)
...
...
@@ -2002,6 +2002,21 @@ int __init mx6q_clocks_init(void)
clk_set_rate
(
&
asrc_serial_clk
,
1500000
);
clk_set_rate
(
&
enfc_clk
,
11000000
);
/*
* Before pinctrl API is available, we have to rely on the pad
* configuration set up by bootloader. For usdhc example here,
* u-boot sets up the pads for 49.5 MHz case, and we have to lower
* the usdhc clock from 198 to 49.5 MHz to match the pad configuration.
*
* FIXME: This is should be removed after pinctrl API is available.
* At that time, usdhc driver can call pinctrl API to change pad
* configuration dynamically per different usdhc clock settings.
*/
clk_set_rate
(
&
usdhc1_clk
,
49500000
);
clk_set_rate
(
&
usdhc2_clk
,
49500000
);
clk_set_rate
(
&
usdhc3_clk
,
49500000
);
clk_set_rate
(
&
usdhc4_clk
,
49500000
);
np
=
of_find_compatible_node
(
NULL
,
NULL
,
"fsl,imx6q-gpt"
);
base
=
of_iomap
(
np
,
0
);
WARN_ON
(
!
base
);
...
...
arch/arm/mach-mx5/clock-mx51-mx53.c
浏览文件 @
09d37c4b
...
...
@@ -1281,9 +1281,9 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
NULL
,
NULL
,
&
ipg_clk
,
&
gpt_ipg_clk
);
DEFINE_CLOCK
(
pwm1_clk
,
0
,
MXC_CCM_CCGR2
,
MXC_CCM_CCGRx_CG6_OFFSET
,
NULL
,
NULL
,
&
ipg_clk
,
NULL
);
NULL
,
NULL
,
&
ipg_
per
clk
,
NULL
);
DEFINE_CLOCK
(
pwm2_clk
,
0
,
MXC_CCM_CCGR2
,
MXC_CCM_CCGRx_CG8_OFFSET
,
NULL
,
NULL
,
&
ipg_clk
,
NULL
);
NULL
,
NULL
,
&
ipg_
per
clk
,
NULL
);
/* I2C */
DEFINE_CLOCK
(
i2c1_clk
,
0
,
MXC_CCM_CCGR1
,
MXC_CCM_CCGRx_CG9_OFFSET
,
...
...
arch/arm/plat-mxc/Kconfig
浏览文件 @
09d37c4b
...
...
@@ -10,7 +10,7 @@ choice
config ARCH_IMX_V4_V5
bool "i.MX1, i.MX21, i.MX25, i.MX27"
select AUTO_ZRELADDR
select AUTO_ZRELADDR
if !ZBOOT_ROM
select ARM_PATCH_PHYS_VIRT
help
This enables support for systems based on the Freescale i.MX ARMv4
...
...
@@ -26,7 +26,7 @@ config ARCH_IMX_V6_V7
config ARCH_MX5
bool "i.MX50, i.MX51, i.MX53"
select AUTO_ZRELADDR
select AUTO_ZRELADDR
if !ZBOOT_ROM
select ARM_PATCH_PHYS_VIRT
help
This enables support for machines using Freescale's i.MX50 and i.MX53
...
...
drivers/mmc/host/sdhci-esdhc-imx.c
浏览文件 @
09d37c4b
...
...
@@ -32,6 +32,7 @@
/* VENDOR SPEC register */
#define SDHCI_VENDOR_SPEC 0xC0
#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002
#define SDHCI_WTMK_LVL 0x44
#define SDHCI_MIX_CTRL 0x48
/*
...
...
@@ -476,6 +477,13 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
if
(
is_imx53_esdhc
(
imx_data
))
imx_data
->
flags
|=
ESDHC_FLAG_MULTIBLK_NO_INT
;
/*
* The imx6q ROM code will change the default watermark level setting
* to something insane. Change it back here.
*/
if
(
is_imx6q_usdhc
(
imx_data
))
writel
(
0x08100810
,
host
->
ioaddr
+
SDHCI_WTMK_LVL
);
boarddata
=
&
imx_data
->
boarddata
;
if
(
sdhci_esdhc_imx_probe_dt
(
pdev
,
boarddata
)
<
0
)
{
if
(
!
host
->
mmc
->
parent
->
platform_data
)
{
...
...
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录