提交 0966a416 编写于 作者: I Ivan Khoronzhuk 提交者: Brian Norris

mtd: nand: davinci: don't request AEMIF address range

The TI AEMIF driver registers are used to setup timings for each chip
select. The same registers range is used to setup NAND settings.
The AEMIF and NAND drivers not use the same registers in this range.

In case with TI AEMIF driver, the memory address range is requested
already by AEMIF, so we cannot request it twice, just ioremap.
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: NTaras Kondratiuk <taras@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
上级 458f3933
...@@ -637,9 +637,17 @@ static int nand_davinci_probe(struct platform_device *pdev) ...@@ -637,9 +637,17 @@ static int nand_davinci_probe(struct platform_device *pdev)
if (IS_ERR(vaddr)) if (IS_ERR(vaddr))
return PTR_ERR(vaddr); return PTR_ERR(vaddr);
base = devm_ioremap_resource(&pdev->dev, res2); /*
if (IS_ERR(base)) * This registers range is used to setup NAND settings. In case with
return PTR_ERR(base); * TI AEMIF driver, the same memory address range is requested already
* by AEMIF, so we cannot request it twice, just ioremap.
* The AEMIF and NAND drivers not use the same registers in this range.
*/
base = devm_ioremap(&pdev->dev, res2->start, resource_size(res2));
if (!base) {
dev_err(&pdev->dev, "ioremap failed for resource %pR\n", res2);
return -EADDRNOTAVAIL;
}
info->dev = &pdev->dev; info->dev = &pdev->dev;
info->base = base; info->base = base;
......
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