drm/radeon: fix UPLL_REF_DIV_MASK definition

Stupid copy & paste error over all generations.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/radeon/evergreend.h

@@ -59,7 +59,7 @@
 #	define UPLL_SLEEP_MASK				0x00000002
 #	define UPLL_BYPASS_EN_MASK			0x00000004
 #	define UPLL_CTLREQ_MASK				0x00000008
-#	define UPLL_REF_DIV_MASK			0x001F0000
+#	define UPLL_REF_DIV_MASK			0x003F0000
 #	define UPLL_VCO_MODE_MASK			0x00000200
 #	define UPLL_CTLACK_MASK				0x40000000
 #	define UPLL_CTLACK2_MASK			0x80000000

drivers/gpu/drm/radeon/rv770d.h

@@ -45,7 +45,7 @@
 #	define UPLL_BYPASS_EN_MASK			0x00000004
 #	define UPLL_CTLREQ_MASK				0x00000008
 #	define UPLL_REF_DIV(x)				((x) << 16)
-#	define UPLL_REF_DIV_MASK			0x001F0000
+#	define UPLL_REF_DIV_MASK			0x003F0000
 #	define UPLL_CTLACK_MASK				0x40000000
 #	define UPLL_CTLACK2_MASK			0x80000000
 #define CG_UPLL_FUNC_CNTL_2				0x71c

drivers/gpu/drm/radeon/sid.h

@@ -36,7 +36,7 @@
 #	define UPLL_BYPASS_EN_MASK			0x00000004
 #	define UPLL_CTLREQ_MASK				0x00000008
 #	define UPLL_VCO_MODE_MASK			0x00000600
-#	define UPLL_REF_DIV_MASK			0x001F0000
+#	define UPLL_REF_DIV_MASK			0x003F0000
 #	define UPLL_CTLACK_MASK				0x40000000
 #	define UPLL_CTLACK2_MASK			0x80000000
 #define	CG_UPLL_FUNC_CNTL_2				0x638