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由 Amit Kumar Salecha 提交于
Future revisions of the chip have 128 bit memory transactions. Require drivers to implement rmw in case of sub-128 bit accesses by driver. This is mostly used by diagnostic tools. Signed-off-by: NAmit Kumar Salecha <amit@netxen.com> Signed-off-by: NDhananjay Phadke <dhananjay@netxen.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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