I was reading the memory barries documentation in order to make sure the
RISC-V barries were correct, and I found a broken link to the atomic
operations documentation.
Signed-off-by: NPalmer Dabbelt <palmer@dabbelt.com>
Acked-by: NWill Deacon <will.deacon@arm.com>
Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: NJonathan Corbet <corbet@lwn.net>