• T
    OMAPDSS: Fix SDI PLL locking · 35d67866
    Tomi Valkeinen 提交于
    Commit f476ae9d (OMAPDSS: APPLY: Remove
    DISPC writes to manager's lcd parameters in interface) broke the SDI
    output, as it causes the SDI PLL locking to fail.
    
    LCLK and PCLK divisors are located in shadow registers, and we normally
    write them to DISPC registers when enabling the output.  However, SDI
    uses pck-free as source clock for its PLL, and pck-free is affected by
    the divisors. And as we need the PLL before enabling the output, we need
    to write the divisors early.
    
    It seems just writing to the DISPC register is enough, and we don't need
    to care about the shadow register mechanism for pck-free. The exact
    reason for this is unknown.
    Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
    Reported-by: NAaro Koskinen <aaro.koskinen@iki.fi>
    Signed-off-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
    35d67866
sdi.c 5.5 KB