The pll controller register set and device state control registers
include sets of registers with different purposes, so it's logically
to add syscon entry to be able to access them from appropriate places.

So added pll controller and device state control syscon entries.

The keystone driver requires the next additional properties:

"ti,syscon-pll" - phandle/offset pair. The phandle to syscon used to
		  access pll controller registers and the offset to use
		  reset control registers.

"ti,syscon-dev" - phandle/offset pair. The phandle to syscon used to
		  access device state control registers and the offset
		  in order to use mux block registers for all watchdogs.

"ti,wdt-list"	- option to declare what watchdogs are used to reboot
		  the SoC, so set "0" WDT as default.
Reviewed-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>