• R
    ath10k: configure frag desc memory to target for qca99X0 · d9156b5f
    Raja Mani 提交于
    Pre qca99X0 chipsets follows the model where dynamically allocate
    memory for frag desc on getting new skb for TX. But, this is not
    going to be the case in qca99X0. It expects frag desc memory to be
    allocated at boot time and let the driver to reuse allocated memory
    after every TX completion. So there won't be any dynamic frag memory
    memory allocation in qca99X0 during data transmission.
    
    qca99X0 hardware doesn't need fragment desc address to be programmed
    in msdu descriptor for every data transaction. It needs to know only
    starting address of fragment descriptor at the time of the boot.
    During data transmission, qca99X0 hardware can retrieve corresponding
    frag addr by adding programmed frag desc base addr + msdu id.
    
    Allocate continuous fragment descriptor memory (same size as number of
    descriptor) at the time of target initialization and configure allocated
    dma address to the target via HTT_H2T_MSG_TYPE_FRAG_DESC_BANK_CFG.
    
    How this is allocated continuous memory is going to be used is not
    covered in this patch. It just allocates memory and hand over to firmware.
    If we don't do it at init time, qca99X0 will stall when firmware tries
    to do TX.
    Signed-off-by: NRaja Mani <rmani@qti.qualcomm.com>
    Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
    d9156b5f
htt_tx.c 17.8 KB