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    ARM: re-implement physical address space switching · d8dc7fbd
    Russell King 提交于
    Re-implement the physical address space switching to be architecturally
    compliant.  This involves flushing the caches, disabling the MMU, and
    only then updating the page tables.  Once that is complete, the system
    can be brought back up again.
    
    Since we disable the MMU, we need to do the update in assembly code.
    Luckily, the entries which need updating are fairly trivial, and are
    all setup by the early assembly code.  We can merely adjust each entry
    by the delta required.
    
    Not only does this fix the code to be architecturally compliant, but it
    fixes a couple of bugs too:
    
    1. The original code would only ever update the first L2 entry covering
       a fraction of the kernel; the remainder were left untouched.
    2. The L2 entries covering the DTB blob were likewise untouched.
    
    This solution fixes up all entries.
    Tested-by: NMurali Karicheri <m-karicheri2@ti.com>
    Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
    d8dc7fbd
Makefile 3.5 KB