We have a wifi module connected to the spi bus and got sometimes FIFO
overrun errors on the spi bus.

After some investigation i found that the driver loads the TCR (transmit
count) register before the RCR (receive count).  When the transfer list is
not empty the atmel_spi_next_message is called while tx and rx are enabled.
 As soon as the TCR is loaded, hardware starts transfer and causes a rx
fifo overrun because the RCR is not loaded yet.

Load the RCR before the TCR.  After this patch the fifo overrun disapears
at out setup.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: NRini van Zetten <rini@arvoo.nl>
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>