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    myri10ge: fix stop/go ordering even more · 8c2f5fa5
    Brice Goglin 提交于
    The doorbell writes may be seen out of order by the firmware if they
    are in WC memory since the tx spin(un)lock does not flush WC writes.
    Hence if the "stop" is written on a different CPU than the "go", it
    is possible that the stop will arrive after the go unless we add an
    explicit memory barrier (and mmiowb() is not enough).
    
    It fixes transmit hangs in multi tx queue mode.
    Signed-off-by: NBrice Goglin <brice@myri.com>
    Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
    8c2f5fa5
myri10ge.c 110.8 KB