Each MU has four pairs of rx/tx data register with four rx/tx interrupts
which can also be used as a separate channel.
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>