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由 Keith Busch 提交于
commit d9e8844c7d8165d97848950ae6bf66b2be86ef06 upstream. Register memory side cache attributes with the memory's node if HMAT provides the side cache iniformation table. Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: NKeith Busch <keith.busch@intel.com> Tested-by: NBrice Goglin <Brice.Goglin@inria.fr> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NFan Du <fan.du@intel.com> Signed-off-by: NJeffle Xu <jefflexu@linux.alibaba.com> Acked-by: NJoseph Qi <joseph.qi@linux.alibaba.com> Acked-by: NCaspar Zhang <caspar@linux.alibaba.com>
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