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由 Vikas Sajjan 提交于
Adds the EPLL and VPLL freq table for exynos5250 SoC. Signed-off-by: NVikas Sajjan <vikas.sajjan@linaro.org> Signed-off-by: NYadwinder Singh Brar <yadi.brar@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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