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由 Gregory CLEMENT 提交于
This extra clock is needed to access the registers of the harware RNG used on CP110 component of the Armada 7K/8K SoCs. This follow the changes already made in the binding documentation (as well as in the driver): "hwrng: omap - Fix clock resource by adding a register clock" Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>
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