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由 Bjorn Helgaas 提交于
Previously we relied on the PCIe r3.0, sec 7.8, spec language that says "For Functions that do not implement the [Link, Slot, Root] registers, these spaces must be hardwired to 0b," which means that for v2 PCIe capabilities, we don't need to check the device type at all. But it's simpler if we don't need to check the capability version at all, and I think the spec is explicit enough about which registers are required for which types that we can remove the version checks. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-By: NJiang Liu <jiang.liu@huawei.com>
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