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    irqchip/gic-v2: Reset APRn registers at boot time · c5e1035c
    Marc Zyngier 提交于
    Booting a crash kernel while in an interrupt handler is likely
    to leave the Active Priority Registers with some state that
    is not relevant to the new kernel, and is likely to lead
    to erratic behaviours such as interrupts not firing as their
    priority is already active.
    
    As a sanity measure, wipe the APRs clean on startup.
    Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
    c5e1035c
irq-gic.c 41.5 KB