NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for
APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma".

Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA
controller driver as in Tegra114, the global pause also clock gate the
DMA register and hence it iw not possible to write the DMA register
with global pause.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
[swarren: fixed DT node order]
Signed-off-by: NStephen Warren <swarren@nvidia.com>