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由 Chien Tung 提交于
Under heavy load, there is an compatibility issue regarding PCIe write credits with certain chipsets. It can be mitigated by limiting read requests to 256 Bytes. This workaround is always enabled for Tbird2 on Gladius. We also add a module parameter to enable workaround for non-Gladius cards. Signed-off-by: NChien Tung <chien.tin.tung@intel.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>
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