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    drm/i915: add encoder->pre_enable/post_disable · bf49ec8c
    Daniel Vetter 提交于
    The cpu eDP encoder has some horrible hacks to set up the DP pll at
    the right time. To be able to move them to the right place, add some
    more encoder callbacks so that this can happen at the right time.
    
    LVDS has some similar funky hacks, but that would require more work
    (we need to move around the pll setup a bit). Hence for now only
    wire these new callbacks up for ilk+ - we only have cpu eDP on these
    platforms.
    
    v2: Bikeshed the vtable ordering, requested by Chris Wilson.
    Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
    Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    bf49ec8c
intel_display.c 226.9 KB