For the gate part of the peripheral clock setting the bit disables the
clock and clearing it enables the clock. This is not the default behavior
of clk_gate component, so we need to use the CLK_GATE_SET_TO_DISABLE flag.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Fixes: 8ca4746a ("clk: mvebu: Add the peripheral clock driver for Armada 3700")
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>