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    mtd: m25p80: Fix 4 byte addressing mode for Micron devices. · 2b468ef0
    Elie De Brauwer 提交于
    According to the datasheet for Micron n25q256a (N25Q256A13ESF40F) 4-byte
    addressing mode should be entered as follows:
    
    <quote>
    To enter or exit the 4-byte address mode, the WRITE ENABLE command
    must be executed to set the write enable latch bit to 1. (Note: The
    WRITE ENABLE command must NOT be executed on the N25Q256A83ESF40x and
    N25Q256A83E1240x devices.) S# must be driven LOW. The effect of the
    command is immediate; after the command has been executed, the write
    enable latch bit is cleared to 0.
    </quote>
    
    Micron's portable way to perform this for all types of Micron flash
    is to first issue a write enable, then switch the addressing mode
    followed by a write disable to avoid leaving the flash in a write-
    able state.
    Signed-off-by: NElie De Brauwer <eliedebrauwer@email.com>
    [Brian: reworked a bit]
    Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
    Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
    2b468ef0
m25p80.c 33.3 KB