• P
    perf, x86: Improve the PEBS ABI · ab608344
    Peter Zijlstra 提交于
    Rename perf_event_attr::precise to perf_event_attr::precise_ip and
    widen it to 2 bits. This new field describes the required precision of
    the PERF_SAMPLE_IP field:
    
      0 - SAMPLE_IP can have arbitrary skid
      1 - SAMPLE_IP must have constant skid
      2 - SAMPLE_IP requested to have 0 skid
      3 - SAMPLE_IP must have 0 skid
    
    And modify the Intel PEBS code accordingly. The PEBS implementation
    now supports up to precise_ip == 2, where we perform the IP fixup.
    
    Also s/PERF_RECORD_MISC_EXACT/&_IP/ to clarify its meaning, this bit
    should be set for each PERF_SAMPLE_IP field known to match the actual
    instruction triggering the event.
    
    This new scheme allows for a PEBS mode that uses the buffer for more
    than a single event.
    Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
    Cc: Paul Mackerras <paulus@samba.org>
    Cc: Stephane Eranian <eranian@google.com>
    LKML-Reference: <new-submission>
    Signed-off-by: NIngo Molnar <mingo@elte.hu>
    ab608344
perf_event.h 26.6 KB