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由 Borislav Petkov 提交于
K8 does not allow for an atomic RMW to a cacheline as F10h does so disable the error injection interface for it. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
a135cef7
K8 does not allow for an atomic RMW to a cacheline as F10h does so
disable the error injection interface for it.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>