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由 Hisashi Nakamura 提交于
In order to change into mode3, CPOL and CPHA bit of SPCMD register of QSPI is changed. Mode3 can avoid intermediate voltage. Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com> [horms: Updated changelog and re-ordered properties] Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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