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    arm64: cacheinfo: add support to override cache levels via device tree · 9a802431
    Sudeep Holla 提交于
    The cache hierarchy can be identified through Cache Level ID(CLIDR)
    architected system register. However in some cases it will provide
    only the number of cache levels that are integrated into the processor
    itself. In other words, it can't provide any information about the
    caches that are external and/or transparent.
    
    Some platforms require to export the information about all such external
    caches to the userspace applications via the sysfs interface.
    
    This patch adds support to override the cache levels using device tree
    to take such external non-architected caches into account.
    
    Cc: Catalin Marinas <catalin.marinas@arm.com>
    Cc: Will Deacon <will.deacon@arm.com>
    Cc: Mark Rutland <mark.rutland@arm.com>
    Tested-by: NTan Xiaojun <tanxiaojun@huawei.com>
    Signed-off-by: NSudeep Holla <sudeep.holla@arm.com>
    Signed-off-by: NWill Deacon <will.deacon@arm.com>
    9a802431
cacheinfo.c 4.1 KB