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    nfp: bpf: support logic indirect shifts (BPF_[L|R]SH | BPF_X) · 991f5b36
    Jiong Wang 提交于
    For indirect shifts, shift amount is not specified as constant, NFP needs
    to get the shift amount through the low 5 bits of source A operand in
    PREV_ALU, therefore extra instructions are needed compared with shifts by
    constants.
    
    Because NFP is 32-bit, so we are using register pair for 64-bit shifts and
    therefore would need different instruction sequences depending on whether
    shift amount is less than 32 or not.
    
    NFP branch-on-bit-test instruction emitter is added by this patch and is
    used for efficient runtime check on shift amount. We'd think the shift
    amount is less than 32 if bit 5 is clear and greater or equal than 32
    otherwise. Shift amount is greater than or equal to 64 will result in
    undefined behavior.
    
    This patch also use range info to avoid generating unnecessary runtime code
    if we are certain shift amount is less than 32 or not.
    Signed-off-by: NJiong Wang <jiong.wang@netronome.com>
    Reviewed-by: NJakub Kicinski <jakub.kicinski@netronome.com>
    Signed-off-by: NDaniel Borkmann <daniel@iogearbox.net>
    991f5b36
nfp_asm.h 11.2 KB